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Photonic circuit design, coming of age in a fabless ecosystem

Feature articles |
By Julien Happich

While it is still lagging about 30 years behind electronic integration in terms of maturity, it is a quickly evolving technology. It experienced its greatest development at the telecom bubble around 2000, where millions of passive optical components for fiber networks started to be integrated into planar lightwave circuits (PLC) made out of silica.

Nowadays, there are several mature material platforms available for fabless chip development, each of them excelling at different features: PLC because of its low loss and low cost passive circuits, silicon (Si) because of its compactness and CMOS compatibility, indium phosphide (InP) because of its capability of generating and amplifying light on a chip, and silicon nitride (Si3N4) because of its low loss and compactness.

Fig. 1: Photonic integrated circuit fabricated in Si3N4 for sensing applications with metallic micro-heaters.

While InP and Si platforms are usually optimized to operate at the optical fiber telecommunication wavelength ranges of C-band (around 1550 nm) and O-band (around 1310 nm), PLC and Si3N4 can also work on the visible wavelength range, down to 400nm where many sensing and biomedical applications operate.

Once the material platform has been selected to meet the requirements of the target application, designers must select a specific foundry, or let an experienced design house like VLC Photonics assist them in choosing the most appropriate one. The design of a photonic integrated circuit starts by solving the optical modes that will be guided along the circuit depending on the waveguide geometry.

Fig. 2: Compact interferometers for quantum optics integrated on a silicon photonics microchip.

A thorough frequency domain analysis is usually performed at this stage, to calculate optical parameters like dispersion, group velocity, group index, propagation loss, effective refractive index, etc., considering certain boundary conditions (periodic, symmetric, asymmetric, metallic, etc.). Common methods for this are FD (Finite differences), FMM (Film Mode Matching), FEM (Finite Element Method), Correlation Method or Gaussian mode fiber solver, and there are several commercial software tools that implement them, like PhoeniX Software or Photon Design.


The next step is the propagation of these optical modes along the components that compose the circuit. While there are several methods to do this (BEP, Eigenmode expansion, transfer-matrix, split-step), the two most common ones are the Beam Propagation Method (BPM) and the Finite Differences in the Time Domain (FDTD). The first is used for light propagation in slowly varying non-uniform guiding structures (e.g. tapers, bends, couplers) and implements a uni- or bi-directional propagation of the total field (not mode fields), either scalar or vectorial, under a paraxial approach.

Fig. 3: Complex microwave photonic integrated circuit layout in InP platform.

The second FDTD method is a discrete representation of time-dependent Maxwell’s equations on a grid, and a wide bandwidth response can be extracted in a single simulation by Fourier transformation of the time-varying response of the system to some input. It is a truly omni-directional method, but it is very computational intensive and it usually requires heavy optimizations.

Once these two steps are done, complete circuit simulation can be done either on the time or frequency domains. This not only allows for the functional design verification of the photonic circuit, but also enables on-chip optimization of the components and their connectivity, the evaluation of tolerances and virtual experiments. Again, there are several commercial tools that allow for this, like Filarete’s ASPIC or VPIcomponentMaker, and design houses can again help with the selection of the most appropriate tools for simulating each stage, or can take care of all the required modeling and simulation works externally.

Fig. 4: Different optical waveguide geometries.

 

The last step consists in laying out the circuit in a photonic CAD tool that outputs a standard GDSII file with hierarchical layers. It is very important to make use of a parametric chip and mask layout, as this avoids any manual drawing or placing mistakes that affect continuity, and eases the routing work. Most photonic foundries provide a Process Design Kit (PDK) that implements the most common building blocks available on their platforms, like straight waveguides (strip and rib), bends, multimode interference couplers, grating couplers and edge couplers to interface with fiber ports, and active components like photodiodes, semiconductor optical amplifiers, modulators, heaters and DBR or DFB lasers.


Such PDKs use standard languages as well as a unified architecture through the PDAflow standard to enable interoperability among multiple EDA vendor tools, and the building blocks included in them are usually included as parameterized device layouts, also referred as pCells. Design houses also provide their own design libraries as a complement to foundry PDKs, and can assist on design validation and rule checking, which is critical to de-risk the complete development given the large timescales and investment required in manufacturing a photonic chip.

Fig. 5: Echelle grating WDM multiplexer for optical datacom, developed in silicon photonics.

Overall, the whole design process is finalized not only when the layout is delivered to the foundry, but when optical characterization is made on the fabricated dies afterwards, and design models are fed back into the simulations, to verify system functionality and fabrication tolerances. This is a critical stage for iterative optimization of a photonic circuit when developing any complex system that eventually needs to go into production. When the number of fabricated dies exceeds a few units, it is recommended to rely on automated characterization setups and measurement equipment provided by test houses, so as to speed up the process and have reliable and consistent information.

Finally, there are many other considerations to be taken into account on the design of a photonic integrated circuit, like testing requirements, packaging standards or best practices, and special design requirements, shortcuts, and optimizations associated with each specific foundry. As a design house providing not only design but test services, VLC Photonics can support the development of any photonic integrated circuit in all main material platforms, given its large experience in the complete fabless ecosystem over the last decade.

Fig. 6: Optical chip characterization is critical to validate design functionality and fabrication tolerances.

 

About the author:

Iñigo Artundo is CEO of VLC Photonics – www.vlcphotonics.com

 

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