Piezoelectronic device holds promise as post–CMOS transistor
The researchers – from the National Physical Laboratory (NPL), IBM, the University of Edinburgh, and Auburn University – showed that a piezoelectronic transistor (PET) based on a pressure-driven insulator-to-metal transition has the potential as a post–CMOS transistor. With a predicted multi-gigahertz, low-voltage performance on the VLSI-scale, the conceptual device offers a performance that cannot be approached by CMOS devices.
The device achieves its performance based on its stress transduction operating principle. The researchers modeled the PET’s performance in the VLSI space and fabricated several prototypes demonstrating proof of principle.
The device was modeled across several scales and application possibilities: as an RF switch at the 1-µm piezoelectric scale, as a large area-low voltage logic transistor at the 140-nm piezoelectric scale, and as a CMOS replacement in VLSI at the 35-nm piezoelectric scale. A four-terminal device version was shown to be capable of providing an RF switch with a figure of merit of 4 fs; a low-voltage/large-area logic switch with a line voltage of 200 mV, 2-GHz operating frequency and a 104 On/Off ratio for on-board computing in sensors; and a VLSI transistor operating at 115-mV line voltage and 8-GHz operating frequency as a potential CMOS replacement.
The PET’s high performance across a range of applications, say the researchers, could be expected to spur further research into piezoelectronic transduction devices in the fast approaching "mega-data era." For more, see the paper published in the journal Applied Physics Letters: The piezoelectronic stress transduction switch for very large-scale integration, low voltage sensor computation, and radio frequency applications.
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