PMIC for DDR5 server memory power management
Rambus has developed a family of power management ICs (PMICs) for the latest DDR5 memory chips in data centre applications.
The Rambus DDR5 family provides a complete memory interface chipset for DDR5 server memory modules including Registering Clock Drivers (RCD), PMIC, SPD Hub and Temperature Sensor ICs.
The PMIC is a critical component in the DDR5 memory architecture, enabling more memory channels, higher capacity modules and greater bandwidth.
- World’s first DDR5 DRAM module has focus on power .
- Integrated DDR5 PMICs reduce memory module footprint
- PMICs to use I3C based standard for DDR5
The Rambus DDR5 server PMIC family includes products for the JEDEC extreme current with the PMIC5020, high current with the PMIC5000 and low current (PMIC5010) specifications for use in RDIMM memory modules..
“Advanced data centre workloads like generative AI require the highest bandwidth and capacity server RDIMMs tailored to meet ever-increasing memory needs of a growing data pipeline,” said Sean Fan, chief operating officer at Rambus. “With the addition of this new family of server PMICs, we expand our foundational technology and offer customers a comprehensive memory interface chipset that supports multiple DDR5 server platform generations.”
“DDR5 memory modules incorporate new chip technologies to deliver higher levels of memory performance within the target power envelope,” said Soo-Kyoum Kim, VP, memory semiconductors at IDC. “Rambus, a proven volume supplier of on-module memory interface chips, is ready to provide the critical PMIC components for the DDR5 memory module makers.”
The Rambus DDR5 PMIC5020, PMIC5000, and PMIC5010 are available now.
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