Polish IP developer clones PIC core for embedded applications
The DRPIC166X is a low-cost high performance 8bit, fully static soft IP core, intended to operate with fast (typically on-chip), dual ported memory. The core has been designed with a special focus on lowest possible power consumption, consuming just 37µW/MHz in a 0.18µm technology.
The core is a pipelined Harvard RISC architecture, being 4 times faster than the original implementation. The PIC family is popular among many engineers due to low cost, wide availability, large user base and extensive collection of application notes, says Jacek Hanke, DCD’s CEO. "That’s why we have not only reduced the power consumption, but also increased the performance," he said.
The DRPIC166X offers 1.3 GHz virtual clock frequency (800 MHz virtual clock frequency in a 0.35µm technology). The DRPIC166X soft core is software-compatible with the industry standard PIC 16XXX microcontrollers but uses an enhanced Harvard architecture (separate instruction and data memories) with independent address and data buses.The 14 bit program memory and 8-bit dual port data memory allow instruction fetch and data operations, to occur simultaneously. The advantage is that the instruction fetch and memory transfers can be overlapped, by multi stage
pipeline, so that the next instruction can be fetched from program memory, while the current instruction is executed with data from the data memory says Hanke. Most instructions are executed within 1 system clock period, except the instructions which directly operate on PC (GOTO, CALL, RETURN) program counter. The pipeline is being cleared and subsequently refilled at additional one clock cycle.
The DRPIC166X Microcontroller fits perfectly in applications ranging from high-speed automotive and appliance motor control, to low-power, remote transmitters/receivers, pointing devices, telecom processors or consumer electronics. Built-in power save mode, makes this IP core perfect for applications, where the power consumption aspect is critical.
The DRPIC166X is delivered with fully automated testbench, complete set of tests and DoCDTM on-chip hardware debugger, allowing easy package validation, at each stage of SoC design flow.
Digital Core Design was founded in 1999 and since the early beginning is considered as an expert in IP core architecture improvements and has sold over 500 licenses to over 300 customers worldwide inlcuding Intel, Siemens, Philips, Osram, General Electric, Rafael and sagem.
www.dcd.pl
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