Printed circuit board technologies updated for intelligent power systems
Migration of electric power generation to the periphery of the grid is presenting new challenges for load balancing and synchronisation. The continuing need for greater efficiency in electric power utilisation and control also means that control systems are in the process of migrating towards individual loads. As a result, greater intelligence is required throughout the grid, from point of power generation to point of power consumption. And the combination of power and intelligence is presenting both challenges and opportunities to the electronics designer: challenges because small, cost-effective intelligent power management modules need to combine digital logic with mains power, and opportunity because new and innovative board level technologies exist to match this challenge.
Background
The "Smart Grid" concept is driven by the transformation of the electric utility industry from a commodity business, where power flows in one direction, toward a services-oriented business in which customers are both producers and consumers. In addition, ageing infrastructure, legislation and economic imperatives demand improvements in efficiency, as centralised load balancing in the current grid requires standby capacity which costs money and burns fuel. This new business model involves active demand-side management in addition to the supply-side management formerly done through passive metering systems. Consumers will be making choices as to how, when, and from whom they purchase electricity or provide demand reductions, and whether to become producers themselves.
Figure 1. The basic Smart Grid concept (source: SmartGrids)
While much of the discussion surrounding Smart Grid is concerned with integration of distributed power generation into the grid and load balancing through the introduction of parallel IT infrastructure as shown in Figure 1, the concept basically involves the creation of active crosspoints capable of controlling power either in the form of supply or demand thereby stabilising the network from the periphery inward. For example, a point-of-use Power Management System has to communicate with other crosspoints, sense the local load, and provide additional demand-side management through direct load control of devices such as hot water heaters, air conditioners, thermostats, and other appliances, as well as to lower the overheads involved in switching Electrical Service Providers (ESPs), where retail choice exists. Distributed intelligence in the form of "Smart Meters" (aka Remote Terminal Units or RTU) also enable ESPs to reduce operating costs and enhance their responsiveness with such capabilities as outage detection and remote connect/disconnect functionality. Smart Meters make it easier for ESPs to offer net metering and feed-in tariffs for customers who own generation such as rooftop solar, where policies exist to promote the adoption of such systems.
Therefore, at the edges of the grid demand side management will be in the form of a “power control computer” with autonomous communication capabilities either via wireless or broadband-over-powerline. This means that control logic will meet mains voltages through metering/consumption monitoring and load regulation. These applications confront the designer with problems which usually are partitioned into separate subsystems: digital logic, communications, and mains voltage (240 VAC)/medium current (20 – 90A) sensing/switching.
To be effective, the Smart Grid needs to involve every point of generation / load. And on the load side it has to approach consumer electronics pricepoints to bring it within reach of the greatest number of users. Although timing of the rollout of Smart Grid infrastructure will vary from region to region depending on saturation and the regulatory environment, market analysts BPA Consulting (UK) expect worldwide shipments of smart meters will peak in 2018 at some 140 million units annually, declining to “only” 115 million by 2022. Figure 2 shows the growth in value for RTUs broken down between data processing/communications and metering for the German market, and every major regional market is closely concerned with these issues.
Figure 2. RTU Functional Value, Germany (source: BPA Consulting, trend:research)
next; the problem…
The Problem
AC power management involves three basic functions; current sensing / measurement, phase detection / synchronisation, and switching. The classic electric power meter uses toroidal transformers and discrete conductors as shown in Figure 3. In addition to the added complexity in BOM (bill of materials) these represent, providing the current sensing function involves assembly of a number of discrete elements, adding both cost and physical bulk. Therefore designers are looking for alternatives within a more highly integrated system.
Figure 3. RTU Teardown (functional components to scale) (source: iFixit, BPA)
Although printed wiring offers an alternative in the same way as circuit boards replaced discrete wiring in the 1950s, the problem is that the mains load current must transit the assembly requiring a much larger conductor cross-section than is standard with printed circuit processes. "Thick copper" technologies are available, but these are generally accompanied by severe design limitations due to etching undercut and the difficulties of encapsulating the copper. Therefore, in the event logic functions are necessary, the logic circuitry has to be wired using thinner (1/2 oz or 1 oz) copper on a daughtercard. In addition to this disadvantage, according to models based on the IPC 2152 charts a board built with 420 µm thick copper would have to be designed with conductors almost 14 mm wide on the inner layers to manage 90A within a 40°C temperature rise: and all conductors on that layer would be 420 µm thick unless additional processing was used to reduce copper thickness. In comparison, HSMtec solves the same problem using a single 0.5 mm x 12 mm copper strip while all non-power circuitry uses standard 1/2 – 2 oz copper.
Current flow through a conductor causes resistive power losses (I2R) in the form of heat, and at high current levels the temperature increase becomes a factor in determining ampacity [ampere capacity] because the resistivity of the conductor changes with temperature. The relationship is linear, i.e. resistivity increases proportional to the change in temperature at a rate determined by the temperature coefficient of the conductor:
(1) RT = RT0 × [(1 + α (T – T0)]
where:
T = temperature at which resistivity is measured
T0 = reference temperature (ambient)
α = linear temperature coefficient (copper = 0.004)
RT = resistivity at measurement temperature
RT0 = resistivity at reference temperature
For a copper conductor, every 25°C increase in temperature means a drop of about 5% in maximum ampacity due to an increase in conductor resistivity, RT. Since this presents the probability of further power dissipation and temperature rise, good design practice must consider effective methods not only to control and reduce conductor resistivity, but also to provide low thermal resistance pathways for heat dissipation.
In a printed circuit board ampacity depends on a number of different factors:
– Conductive + convective capability provided by spreading layers, ground layers, stackup
– Ratio of track width to thickness
– Ambient temperature
– Adjacent high current tracks
– Presence and frequency of partial cross-section shrinkage
– Presence, number, and conductive cross-section of plated through holes in series with the conductor
Therefore optimum current design needs to consider more variables than are normally addressed by the IPC 2152 current vs. temperature charts.
The other primary challenge for the RTU is load switching. New generations of power semiconductors are emerging in response to the need for intelligent power management across an expanding range of applications, from Automotive through Renewable Energy Harvesting, Appliances, Solid State Lighting, and RF Power. All of these applications share the same objective- the efficient and economical management of power. Heavy, bulky electromechanical relays are being replaced by IGBT or MOSFET switches, and these same devices are also used for power control through pulse width modulation of IGBT or MOSFET power stages.
The problems faced by peripheral crosspoints in Smart Grid systems are identical to those involving Digital Power – the need to carry and control loads up through 24 kVA. Power semiconductors packaged as surface mount devices are enabling significant form factor improvements for power management and control systems, leading to a proliferation of package types such as those shown in Figure 4.
Figure 4. Power semiconductor packaging evolution
In addition to the direct-drive capabilities provided by increasing voltage and current ratings, most of these bring lower assembly costs and improved assembly efficiencies through surface mounting. But, since they’re power devices some fraction of that is transformed into thermal energy notwithstanding the improvements in junction efficiencies, and this has to go somewhere or the device will overheat. This is bad news for lifetime and reliability, because semiconductor lifetimes and failure rates are directly connected to temperature of the semiconductor junction. Most predictive models base the relationship between temperature and failure rate on the Arrhenius equation, where temperature can be used as a proportional multiplier. A first-order solution of this relationship suggests that MTTF (mean time to failure) is reduced by half for every 10°C rise in junction temperature.
The combination of surface mount packaging and compact assembly volume means that in most cases the heat can no longer go out to ambient through a heatsink. Surface mounted devices are intended to be small, and they lay flat on the board. So, at least for the first part of the [heat’s] journey, the only way out is down… into the board. Which means that the designer must now consider the need for low-resistance thermal pathways in addition to the well-known mounting and interconnection functions.
next; the solution …
The Solution
The solutions which are emerging offer the potential for replacement of hardware and components formerly used to manage heat and power, and range from simply providing a metal base in the board for heat dissipation to sophisticated solutions combining thermal and power management with high density interconnect and formability. The term “Metal in the Board”, or “MiB” is coming into general use, because these solutions are not metal “core” or metal “base”. They are metal “in” the board.
The manufacturing technologies and capabilities of MiB range from simple three-layer buildups commonly known as “Al-based” or “insulated metal substrate” to complex assemblies using a variety of techniques to provide low thermal and electrical resistance pathways in the board. In every case, the MiB component is providing additional functionality – thermal and/or power management.
One of the more innovative MiB solutions is is “HSMtec”, developed by the Austrian PCB manufacturer Häusermann GmbH. HSMtec typically uses 0.5mm diameter copper wire and rectangular sectioned 0.5mm thick copper strips (“profiles”) to provide discrete low resistance electrical and thermal pathways in the board as shown in Figure 5.
Figure 5. HSMtec concept
There are a number of advantages to this solution compared to conventional thick copper or metal core boards:
– Enhanced thermal and current pathways only where needed
– Cost of MiB limited to those nets needing MiB
– Wiring densities up to and including HDI enable logic and power integration
– Conventional pcb processes (manufacturing, soldering, assembly) ensure consistently high reliability
– FR-4 materials reduce CTE mismatch common to aluminium based substrates
– Board may be folded during assembly, eliminating daughterboards/connectors
The profiles and wires which make up the MiB components in an HSMtec board are bonded to tracks etched on inner-layer cores, basically forming a sandwich consisting of the etched track and the bonded elements. This patented process ensures a consistent bond line between the track and the wire/profile which is essential for uniform heat spreading and consistent conductor cross-sectional area. It also simplifies the layout task and/or conversion from conventional designs, as placement of the high current MiB components: the wires and profiles will be done on what are essentially enlarged tracks on an inner or outer layer.
This arrangement provides a great deal of flexibility in stackup configuration. Profiles/wires are bonded to a routing track, and thermal dissipation planes can be located on the same layer or on a facing layer co-axial with the MiB track. Design guidelines include ampacity tables based on actual thermographic observations of different layup configurations. As shown in Fig. 6, HSMtec is optimised for "medium" power applications with nominal currents of 5 to 150A (40°C temp rise). Depending on the individual requirements for temperature rise and thermal management strategies this value can easily run to over 400A.
Figure 6: Temperature rise vs. current for 4-layer stackup
The medium current capability, heat-spreading characteristics, and design versatility of HSMtec make it a cost-effective alternative to logic boards, busbars, and cable in an expanding range of applications.
next; design examples…
Design Example: Current Sensing
The capabilities of HSMtec mean Smart Meter projects of all practical ampacities can replace busbar designs with a simpler, more highly integrated solution. The upgrade of a light commercial/residential Smart Meter presented the opportunity for a complete redesign of the unit. The older version used a complex structure of high-current busbars to carry from 1 – 3 phases of current up to a continuous level of 90A incorporating a shunt and breaker for each circuit. The design managed current sensing and breaker decisions using digital logic, and incorporated data processing and communications. These "intelligent" functions were packaged onto a daughterboard while the high current/shunt assembly was separate hardware.
The boundary conditions for the design exercise were:
– Max. 90A continuous current per phase
– Max. ambient temperature 85°C, therefore a maximum permissible temperature rise of 40°K
– Cabling interface to use high-perfomance 15-mm pitch PCB terminal with clamping yoke connection, 4.5-mm tinned soldering pins
– data sensing, processing, and communications logic on the same board as the shunt assembly.
Figure 7. HSMtec layout and stackup for shunt profiles
After an initial analysis of stackup requirements driven by logic complexity and current levels in the shunt section, Häusermann settled on the 4-layer structure with buried profiles shown in Figure 7. The inclusion of facing planes on the outer layer was designed to improve thermal performance as mentioned earlier, enabling use of 12 mm wide profiles on the inner layers.
The final design was a compact board measuring 140 x 100 mm. The "chicken test" was the behaviour of the assembly under continuous load conditions. After more than 30 minutes at a continuous load of 90A, a 38K temperature rise was observed with the distribution shown in Figure 8. This exceeded the specification, indicating that the technical goals of the program had been met.
Figure 8: Thermographic test setup and results
Value in the Board
Faced with a solution presenting this level of innovation and simplicity, the first question is almost invariably, "but how much does it cost?" While the applications requiring this solution are driven primarily by reliability and performance (existing metering systems are benchmarks for reliability, with service lifetimes of 40 years or more), the accompanying combination of mass market economics and intelligent power control means that any alternative technology either has to come in at parity and be ready to follow the same cost reduction trajectory as the assembly it replaces, or offer an order of magnitude improvement: in cost, performance, reliability, or a combination of all three.
The design example presented above accomplished several objectives:
– it eliminated the need for busbars in the shunt circuit with their associated mounting hardware and assembly complexity
– it enabled the use of automated component placement and insertion during assembly with consequent improvements in yield and reduction in assembly costs
– it eliminated a separate motherboard, simplifying the BOM, improving assembly logistics and reducing the volume of the finished assembly.
As a result the overall cost of the solution was less than that of the assembly it replaced.
next; current switching example…
Design Example: Current Switching
Another function expected of power management systems as intelligence moves out to the periphery of the grid is dynamic demand management. Modulating demands which respond to environmental setpoints such as heating, air conditioning, and hot water on the basis of overall grid loading offers the potential for significant improvements in overall power efficiency, particularly considering that non-productive reactive power levels may be as high as 30% in older networks.
Effective demand management involves load sensing and switching every appliance or service compatible with this technology. Therefore the shunt application presented above will be coupled with a medium-current switching circuit which can be built around an IGBT or MOSFET power semiconductor. HSMtec provides a good solution to this problem because the currents switched by the power devices can be carried in an FR-4 board while at the same time the copper profiles provide direct heat dissipation.
Figure 9. HSMtec layout for DirectFet (International Rectifier) package
A four-layer solution is shown in Figure 9. In this case, smaller profiles (4 – 8mm) may be used, as the load for each MOSFET is confined to a single appliance and consists of 25A or less. In this layout, the profiles have been bonded to an inner core consisting of High Tg FR-4 clad with 2 oz (70 µm) copper. Since the profiles are all on the same reference plane, setup and run time for the bonding equipment is optimised and the subsequent mass-lamination process has a less complex embedding task compared to a design where the profiles are on several different layers. The embedded profiles also free up real estate on the surface of the board: the area needed for the high-current tracks is confined to the via arrays used to access the embedded profiles while the wide tracking necessary to support the profiles is confined to the internal layer. The thermal dissipation needs of the power device can be addressed by arrays of vias providing pathways from a thermal pad on the board surface down to internal and backside dissipation planes. Managing the power tracks inside the board leaves room for signal and control wiring on the outer layer, and the gate signals for the parallel FETs are run on the surface of the board. Typical dimensions for a layout of this kind were shown above in Figure 7 as well as the positioning of the profiles on the etched core carrier tracks. Gaps between the profiles have been expanded for clarity: the gap volume represents a variation of less than 0.1% of the total conductor volume. The result of this design is the clean footprint shown in Figure 10.
Figure 10: HSMtec footprint for DirectFet (International Rectifier) package
Although this solution is more complex than a conventional 4-layer board it also now integrates all the interconnection and power management functions of the unit, eliminating the need for separate cooling and high-current hardware with the associated assembly complexities and cost. In this case elimination of busbars, their assembly costs and hardware has provided a net savings of about 13% as shown in Fig. 11.
Figure 11. Cost comparison; conventional PCB + power management hardware vs. HSMtec
Conclusion
Smart Grid RTUs are a rapidly growing opportunity with the need for a combination of digital communications and control of mains power at consumer electronics pricepoints. Conventional solutions involving discrete AWG6 wire, busbars, and electromechanical relays will not meet the cost, reliability, and performance needs of distributed intelligent systems. Innovative technologies provide the flexibility and integration necessary for the successful marriage of intelligence and power.
About the author
Stefan Hörth holds a Masters in Electrical Engineering with a background in Innovation Management. Since 2010 Stefan has been part of the applications R&D team at Häusermann GmbH responsible for high current and heat management PCBs. He is leading international customer projects and several cooperative research programs with a focus on business development and partner relationships. He can be contacted at: stefan.hoerth@haeusermann.at
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