Printed passive memory array reaches 40-bit
The passive array architecture separates the memory from the read/write electronics and dispenses with the need for active circuitry within the memory array and memory cell, making it suitable for very high-volume manufacturing and consumer applications. The ferroelectric polymer-based 40-bit memories are in test production, and engineering samples will be available later this year. Higher density memories are under development, with planned production in 2012 (up to 121-bit per memory array) to meet the needs of secure archiving, ticketing, and other applications that demand encryption or user-programmed stored IDs. The company is also prototyping addressable array memories that include printed transistors to drive logic for reading and writing data to the memory cells.
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