Processing platform simplifies vehicle computing architecture
In an environment where the volume of installed software in today’s automobiles is already in the range of 100 million lines of code (LoC) and complexity continues to increase continuously, action is needed: OEMs will place importance in the future on cleaning up the electronics architecture and putting a stop to the increase in complexity. To this end, automakers are in the process of clearing out and modularizing the widely dispersed ECU landscape in the vehicles, and combining the large number of functions in a few domain computers (see Fig. 1). ECUs of the same risk category are accommodated in the same domains.
With its S32 platform, NXP wants to create the basis
for a consistent computer architecture.
Chip manufacturer NXP has foreseen this development and developed a computer platform for it. The S32 platform combines high-performance processors with functional security up to the maximum level of ASIL D. “Functional Safety is no longer a witchcraft, but the solutions available on the market do not represent the maximum of performance,” says Lars Reger, CTO of NXP. “Our platform offers customers a tenfold increase in computing power compared to today’s standards,” said NXP, commenting on Infineon’s widely used Aurix architecture.
Another aspect that was the driving force behind the development of S32 is the reusability of software. Because this platform makes it possible to use a common processor architecture across all vehicle domains, 90 percent of the software developed could be used more than once; software development would thus be drastically simplified, promises NXP.
Like many other insiders, NXP assumes that the software in the cars will be updated regularly via the air interface in the future. Therefore, the S32 platform is designed for updates over the air (OTA), whereby a high-security data transmission is a prerequisite.
Other features include scalability over a wide bandwidth. This is ensured by the use of different processors from ARM: Cortex-M for low-power applications; Cortex-R for applications where high real-time capability is required; and Cortex-A for applications with high performance requirements. Application-specific IP provides customized hardware support for key domain-specific requirements such as secure gateway, radar, powertrain and engine controls.
According to NXP, pre-silicone emulations of the platforms are already being used by major OEMs to determine the suitability of the platforms for their respective requirements. Development tools are available from the usual third-party providers.
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