QDR Consortium unveils highest speed SRAMs

QDR Consortium unveils highest speed SRAMs

Technology News |
By eeNews Europe

The devices will be drop-in replacements for existing QDRII+ devices and will require no changes to the board or PCB track layout, says the Consortium, allowing manufacturers to benefit from higher performance just by increasing the clock speeds.

They will also be offered with either x18 or x36 word widths and with bursts of 4 or 2 access. The burst 4 devices deliver a random transaction rate (RTR) of 633 million random transactions per second, operating at a clock speeds of 633MHz. The burst 2 offerings operate at a frequency of 450MHz and offer an RTR of 900 million random transactions per second, which doubles the RTR of the prior generation burst of 4 devices running at the same frequency. The random transaction rate is defined as the number of fully random memory accesses per second and is the critical memory metric enabling increased line/switching rates.

First engineering samples of the 36Mbit and 72Mbit QDRII+ Xtreme devices from Cypress are expected for lead customers in mid-2011.

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News


Linked Articles