The Sureboot QSPI IP NOR flash memory controller IP is an extended version of the SPI protocol allowing the use of four data lanes leading to highly effective overall bandwidth. The company says that its QSPI IP provides the user immediate access to flash memory from SPI mode on startup, or alternatively it can be configured for any other mode from SPI to Dual SPI or Quad SPI.
In addition, a DMA command may be issued to copy memory from the flash device to anywhere else on the bus. The QSPI host controller offers the following features:
- Compliant with AMBA AXI3/4 and AXI4-lite protocols. An APB control port interface is available if desired instead of the AXI4-lite control port interface.
- User configurable clock frequency support
- Designed to support all leading NOR FLASH devices.
- Configurable bus width, Full & Narrow AXI burst support
- DMA for maximum bus throughput
- Supports 24 or 32b addressing and User selectable commands.
- Supports Execute in Place flash access protocols
- Backwards compatible with SPI and Dual SPI devices
The all-digital controller is available immediately.