Faraday in Taiwan has launched a prototyping platform for system-on-chip designs at 14nm using the Hyperbus high speed memory interface.
The SoCreative!VI A600 SoC development platform is based on ARM Cortex-A53 processor at Samsung Foundry’s 14LPP FinFET process. It contains a quad-core Cortex-A53 running up to 1.5GHz and integrates with multiple high-speed interfaces, including LPDDR4/4X, PCIe-Gen4, Gigabit Ethernet, and USB 2.0 OTG. It also includes the HyperBus memory interface.
The platform also integrates Faraday’s Root of Trust IP (Soteria) to support multi-function hardware secure engine and multi-stage secure protection.
This allows system logic architecture verification by connecting to a FPGA with the target design. This can shorten overall ASIC development cycle time for early to market for applications in networking, AR/VR and AIoT/Edge computing.
Software support for the platform includes Tensorflow Lite for AI, Linux kernel 5.10, FreeRTOS and OPTEE, the Open Portable Trusted Execution Environment.
“Faraday’s latest SoCreative series platform A600 allows customers’ SoC projects to quickly migrate to the FinFET process,” said Flash Lin, chief operating officer of Faraday. “With the deployment of this platform, we offers significant additional value to ASIC customers seeking earlier entry into the IP evaluation and software development of their SoC projects across numerous next-generation applications.”
Other articles on eeNews Europe
- MIT launches AI hardware programme
- Synopsys boosts chip design with cloud platform
- Glass processors aim to boost edge AI