Quad port expander saves on BoM and eases PCB layout
Using the PI7C1401, four low-speed ports can be aggregated into a single channel and by combining multiple quad port expanders, a host processor can control up to 56 transceivers through a single I2C/SPI interface. This can significantly lower the pin-count on the host processor or FPGA used to control the high-speed transceivers, as well as ease PCB layout and reduce the overall bill-of-materials (BoM). The I2C interface supports 1MHz fast mode and allows up to 14 PI7C1401 devices to share a single interface. The devices automatically configure their respective addresses by daisy-chaining their control pins. A bus speed of up to 33MHz is supported when using SPI mode, which effectively allows an unlimited number of PI7C1401 devices to share a single SPI interface. The PI7C1401 also features four user-programmable GPIO, along with two outputs dedicated to driving status LEDs. The PI7C1401 quad port aggregator supports separate host-side I/O voltages, from 1.8V to 3.3V. It comes in a 56-ZF (TQFN) 5x11mm package at 0.5mm pitch, allowing it to be surface-mounted to the underside of a PCB and close to the physical interfaces.
Diodes Incorporated – www.diodes.com
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