
The serdes is suitable for use in terabit switches, routers, optical transport networks (OTNs), and high-performance networking equipment.
The LR SerDes includes a scalable analog-to-digital converter with support for PAM-4 and non-return to zero (NRZ) signaling plus a DSP-based architecture for improved signal-to-noise ratio (SNR) and extended reach.
The design is configurable to allow power, performance, area trade-offs for medium reach (MR) and long reach (LR) applications.
The SerDes PHY design is available for licensing and early access customers.
“We’re excited to continue to expand our IP portfolio and deliver our customers top-of-the-line performance and flexibility for today’s most challenging systems, including solutions like our 112G LR SerDes PHY,” said Hemant Dhulla, vice president and general manager of IP cores at Rambus.
Related links and articles:
News articles:
Kandou Bus raises another $15 million
Startup offers 112Gbps SerDes targeting 7nm silicon
112 Gbps SerDes validated in 7nm FinFET for next-gen FPGAs
