
Rambus sells its PHY business to Cadence
Cadence Design Systems is to acquire the SerDes and memory interface PHY IP business from Rambus in a deal reported to be worth $110m.
Rambus will keep its digital IP business, including memory and interface controllers and security IP. The expected technology asset purchase also brings Cadence proven and experienced PHY engineering teams in the United States, India and Canada.
“The accelerating momentum of AI and continued growth in the data centre is driving ever-increasing demand for memory and security,” said Sean Fan, senior vice president and chief operating officer at Rambus. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data centre and AI.”
- Achronix picks Rambus GDDR6 PHY IP for next-gen FPGA
- Cadence design flows and IP for Intel 16 FinFET process
- Tachyum sues Cadence for $211m over failed IP
“Memory and SerDes IP design and integration continues to be integral to the design of AI, data center and hyperscale applications, CPU architectures and networking devices, and the addition of the IP and seasoned team further accelerates Cadence’s Intelligent System Design strategy, which drives design excellence,” said Boyd Phelps, senior vice president and general manager of the IP Group at Cadence.
“The acquisition of the Rambus PHY IP broadens Cadence’s well-established enterprise IP portfolio and expands its reach across geographies and vertical markets, such as the aerospace and defense market, providing complete subsystem solutions that meet the demands of our worldwide customers,” he said.
The transaction is expected to be immaterial to revenue and earnings this year for each company. It is expected to close in the third calendar quarter of 2023, subject to certain closing conditions.
www.cadence.com; www.rambus.com
