Ratiometricity, digital signal correction enable high-res, low-noise smart sensors

Ratiometricity, digital signal correction enable high-res, low-noise smart sensors

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By eeNews Europe

Today’s customers for sensors and sensor systems expect to see improvements to performance parameters like module size, operating complexity, price, and energy consumption, as well as lower overall costs. The generally ever-growing need for information and performance leads to constantly increasing demands for both consumer and industrial applications when determining environmental conditions, such as pressure, temperature, weight, flow rate, torque, vibration, tension, and strain.

These requirements result in higher demands on sensor sensitivity, resolution, interference immunity, and precision. Within this context, the concept of a "smart sensor" system with a direct bus connection has continued to gain widespread acceptance in recent years. This system approach usually comprises the following functional elements: Sensor, analog signal conditioning (such as amplification, offset correction), analog-to-digital conversion, digital signal correction, bus interface, and digital analysis.

While smart sensors are now considered the de facto standard for new products launched on the market, particularly when it comes to high-precision sensor applications, one still finds extremely varied levels of performance as far as the actual signal conditioning and processing is concerned. For example, companies often advertise and offer an interface or signal conditioning IC with 16-bit signal resolution, although ultimately the resulting measurements may exhibit noise of up to several tenths of a percent of the full signal range. In these cases, the user only sees the desired performance in virtual form, since the low signal quality of the resulting measurements means that, for example, only 10 to 12 bits of effective resolution is actually available from the original range.

Thus, in addition to system concepts, the elimination, compensation, or at least minimization of circuit-specific analog interference still is, and, in the transition to smaller technologies, repeatedly becomes a major task.

Luckily enough, circuit topologies and approaches exist which remain valid and particularly effective—irrespective of the underlying technology—for the implementation of high-resolution, energy-efficient, low-noise smart sensors.

The ratiometric measurement principle is an often-used concept that eliminates interference in the power supply. In ratiometric measurements, the measured quantity sought after is the ratio of two quantities that typically exhibit interference. In this context, however, it is crucial that the interference does not impact the actual measurement. A ratiometric value is independent of the supply voltage, for example.

The figure below shows that the ratio of the measured voltages V1 and V2 to the resistances R1 and R2 is independent of the absolute value of the supply voltage VDD. As a result, when the value of R1 is known, one can determine the resistances R2 by means of measuring the voltages’ ratio and using the formula: R2 = R1•V2/V1.

In a system-integration approach, this principle can be extended for the use in complex sensor interface and sensor signal conditioning (SSC) integrated circuits (e.g. ZSI21013 and ZSSC30xx from ZMDI, MAX1452 from Maxim, AT77C104Bx from Atmel, etc.). A ratiometric topology allows for nearly noise-free applications that are essentially immune to supply voltage interference and have an effective signal resolution of 16-bit.

The basic ratiometric principle can be adopted for the amplifier and the analog-digital converter (ADC) in an SSC. In this case the internal IC reference voltages Vref or rather Vrp and Vrn are directly derived from the resistive bridge sensor element’s supply voltage VDD.

Ratiometric topology for resistive bridge sensor signal measurement.

As a result, interference to VDD does systematically not affect the ratio of the sensor voltage VIN to the ADC’s input voltage. Hence, even in case of fluctuations of IC-internal absolute levels of the supply voltage VDD, there is no spurious effect in the A2D-converter’s output Zout.

In principle, the following equation applies in this case:

where GAMP represents amplification, and Voff represents the internal offset within the signal path.

In addition, for future SSC generations, the applicability of concepts is a research objective today in academia and industry to develop low-power supply voltage suppression using suitable voltage regulators. Thereby low dropout regulators (LDOs) will make it possible to use high-resolution, low-power sensor systems in environments with significant levels of interference, such as in smart phones. In this context, the voltage regulators reduce dynamic losses due to parasitic capacitances in the signal path and allow for systems with effective 16- to 24-bit resolution and operating voltages down to the respective silicon-processes related transistor supply minimum, while utilizing a ratiometric signal path at the same time.

Signal conditioning and auto-zero correction
In addition to the analog performance parameters, the ability of standard SSCs to correct digital signals is also of essential importance. Sensor systems typically exhibit an inherent non-linearity, which results from both the actual variable measured (such as atmospheric pressure, hydrodynamic pressure, or torsion vibration), as well as from the characteristics of the sensor element itself. In addition, there is often a non-linear correlation between the sensor signal and the environmental or sensor system temperature (which is not only the case for resistive sensors).

In order to linearize the resulting measured values and enable subsequent analysis in an optimal way, modern SSCs have specially adapted digital processing unit which utilizing numerous signal conditioning coefficients. The corresponding required calibration points are specific to each sensor IC pair, and must be obtained individually, which is usually carried out during the sensor system’s assembly. In addition these enhanced SSCs provide an integrated temperature sensor to minimize the bill of material while retaining the benefits of the combined bridge sensor and temperature signal correction.

Internal circuit signal offsets, Voff, can be calculated using an "auto-zero (AZ) measurement," which ultimately corrects the sensor signal actually desired. To do so, the signal path is shorted directly at the IC input.

Calibrating the sensor system: Fault effect compensation and linearization.

In addition to signal correction, the AZ measurement also enables inherent application diagnostics for monitoring such parameters as system stability and drift behavior. Thanks to these methods, both non-linear and temperature-sensitive variables and sensor signals can be ideally prepared for the actual information processing stage that follows.

Standard features
The aforementioned characteristics, existing and upcoming sensor interface and SSC circuits offer industry-standard conformity and flexible digital interfaces such as One-Wire Interface (OWI), I²C or SPI, etc. Typically, either a charge-balancing (CB) architecture with programmable resolution and segmentation is used as the base IP for the ADC in low-power applications with smaller sampling rates, or sigma-delta approaches are chosen for less power-critical smart sensor systems with sampling rates of more than 1k samples per second.

With the segmented CB-ADCs, one can choose between pure MSB (most significant bit) conversion and a combination of MSB/LSB (least significant bit) conversion. In either case, there is the option to specify the proper ratio of converting speed to improve noise reduction in the resulting measurement for the specific area of application. Using analog pre-amplification (which can be programmed precisely) and an adjustable ADC input offset shifting, such ICs can be customized to a variety of different signal curves, depending on environmental signals and sensor element characteristics (particularly when it comes to offset, sensitivity, and the measurement range).

Moreover, the availability of standard but application specific ICs as well as market competition has already resulted in: Continuous technical improvements (of features and parameters) and decreasing size and cost for the respective SSC circuits. In consequence, these basic, inherent facts result in a wide spectrum of commonly available sensor signal conditioning ICs for the development of new and future smart sensors and respective applications.
b>Energy efficiency is a must
Operation at low supply voltages down to 1.8V or lower with a current consumption of 1 mA maximum (during analog-to-digital (A2D) conversions, etc.) are today’s standard requirements and state-of-the-art for existing and upcoming SSCs. In order to make energy-efficient sensor applications beyond that possible, one approach is for SSCs to offer a variety of different operating modes. In this context, there are mainly three modes used commonly.

  • Continuous/Update Mode: All IC-internal blocks are powered continuously. The IC reaction on measurement request is at maximum. Current is consumed even during "inactive" times when no A2D-conversion is conducted. As version of this a periodic, updating measurement is performed without additional measurement request commands. The respective results can be polled accordingly.
  • Sleep/Wake-Up Mode: Most of the time the interface is listening to the digital interface bus. Only in case of receiving a valid command, the respectively required IC-blocks are powered and the command’s request, e.g. conduct a sensor measurement is processed. Thereby, only stand-by currents are consumed, if no IC-activity is necessary. On the other hand, the response time on command requests is slightly longer than in the Continuous or Update Mode.
  • Command/Test Mode: All IC-internal blocks are powered but can also be switched off by command. Specific knowledge and understanding of the IC’s system architecture is required. Typically, this kind of operation mode is used for test purposes or to enable application-specific support from the IC-vendors to the respective customers of SSI and SSC devices.

For example, with the ZSSC3016 from ZMDI, the sleep mode in particular can minimize the average power consumption. In sleep-mode, a circuit is in a virtually powered-down state (current draw << 1μA is possible), which it can wake up from within fractions of a second upon receiving a bus command or an appropriate circuit ID. Once awake, a complete sensor measurement is carried out, after which the IC immediately returns to standby mode. Dependent on the interface protocol, the resulting measurement can even be accessed in standby (low-power) mode. Comparable power reduction capabilities are also known for ICs from Maxim, Atmel, and others.

An additional approach to influence and hence to minimize the overall power consumption is the voltage domain sectioning. Thereby, regulators, reset blocks and the interface of the ICs are designed for a wider supply range than the analog sensor front-end and the digital calculation units, etc. The latter are operating at a minimum (internally regulated) supply voltage. Typically, an SSC-device also delivers the voltage supply (being the minimum internally regulated supply voltage) for the externally connected sensor element. In consequence, the current consumption of the sensor element is also reduced by the low, down-regulated supply from the SSC.  As a result, available state-of-the-art circuits have average current draws far below 100 μA in a one measurement per second bench test scenario.

Thus, the latest product releases of SSC-circuits offer the market for standard ICs the ability to create size-optimized, energy-efficient smart sensors with performance parameters that up until now have only been seen in ASIC-based or individual chip solutions.

Marko Mailand is project manager for mixed signal IC development in the Medical, Consumer, and Industrial Division of ZMDI, Dresden, Germany.

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