Reference design for image sensor interface
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The reference design supports all modes of Aptina’s specification, HiSPi, and can be used with ready-made examples or with a configuration tool to generate a bespoke interface, which would then be implemented in a LatticeXP2 FPGA.
Between one and four data lines can be supported, with an interface bandwidth of up to 700Mbit/s . The parallel bus width is also configurable; between 10 and 16bits, with a voltage level of between 1.8 and 3.3V.
Aptina’s CMOS sensors are used in security cameras, as well as automotive applications, consumer cameras and wherever higher resolution and higher frame rate is required.
For more information, visit www.latticesemi.com/sensorbridge
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