Renesas doubles down on GaN as competition hots up
Cette publication existe aussi en Français
Renesas Electronics says it is doubling down on its commitment to gallium nitride (GaN) power devices with a move to 200mm wafers with 650V d-mode devices as the market heats up.
Navitas Semiconductor is also moving to 200mm wafers through a deal with Powerchip and Infineon Technologies is readying production on even larger 300mm wafers.
The Renesas move is based on a recent partnership deal with Polar Semiconductor in the US as well as production in Japan at a second 200mm fab starting in 2027. The company has announced it has paused development of both silicon carbide (SiC) and IGBT silicon power devices to focus on GaN.
“Renesas is doubling down on GaN and MOSFETs where there is sustained demand,” said Primit Parikh, general manager of the GaN business division. This has combined GaN chip developer Transphorm, where Parikh was a co-founder, with the controller and driver chips from Dialog Semiconductor.
The bidirectional depletion mode (d-mode) devices have a simpler structure and lower on resistance per area, allowing for lower cost devices, he says. The focus is on 650V devices for the data centre, and the bidirectional capability can support +-400V for 800V power delivery networks such as the consortium promoted by Nvidia.
However there are no plans for the higher voltage 1200V devices that had been in development at Transphorm. “1200V is on hold as we monitor the market and talk with customers,” said Parikh.
Market analysts expect the GaN revenue for power applications to grow by 36 percent annually to approximately US $2.5 billion by 2030, although that may be an underestimate as the technology drives into the AI datacentre to boost efficiency.
Navitas GaN deal
Navitas Semiconductor today announced a strategic partnership with Powerchip Semiconductor Manufacturing Corporation (PSMC or Powerchip), to start production and continue development of 200mm GaN-on-silicon technology.
Navitas plans to use Powerchip’s 200mm in Fab 8B, located in Zhunan Science Park, Taiwan, which offers a 180nm process for mprovements in performance, power efficiency, integration, and cost.
“200mm GaN-on-silicon production on a 180nm process node enables us to continue innovating higher power density, faster, and more efficient devices while simultaneously improving cost, scale, and manufacturing yields”, said Dr. Sid Sundaresan, SVP of WBG Technology Platforms at Navitas.
Powerchip is expected to manufacture the Navitas portfolio with voltage ratings from 100V to 650V, supporting the growing demand for GaN for 48V infrastructure, including hyper-scale AI data centres and EVs. Qualification of initial devices is expected in Q4 2025.
The 100V family is expected to start production first at Powerchip in 1H26, while the company expects 650V devices will transition from Navitas’ existing supplier, TSMC, to Powerchip over the next 12 to 24 months.
“We are proud to partner with Powerchip to advance high-volume 200 mm GaN-on-silicon production and look forward to driving continued innovation together in the years ahead”, said Gene Sheridan, CEO and co-founder of Navitas. “Through our partnership with Powerchip, we are well-positioned to drive sustained progress in product performance, technological evolution, and cost efficiency.”
“Powerchip has collaborated with Navitas on GaN-on-Si technology for years, and we’re thrilled to announce that product qualification is nearly complete – bringing us to the verge of mass production,” said Martin Chu, President at Powerchip.
300mm wafers
Infineon is also expecting first samples of GaN devices available for customers from 300mm wafers by the end the year.
“Our fully scaled-up 300mm GaN manufacturing will allow us to deliver highest value to our customers even faster while moving towards cost parity for comparable silicon and GaN products,” said Johannes Schoiswohl, Head of GaN Business Line at Infineon. “Almost a year after the announcement of Infineon’s breakthrough in 300-millimeter GaN wafer technology, we are pleased that our transition process is well on track and that the industry has recognized the importance of Infineon’s GaN technology enabled by the strength of our IDM strategy.”
The larger wafer diameter allows 2.3 times more chips to be produced per wafer but also requires a single wafer epitaxial reactor, rather than processing multiple 200mm wafers, says Parikh at Renesas.
“Epi wafer scaling is very different for 300mm as you move form multi wafer reactors to Single wafer reactors, but the real impact is to be studied,” he said. “We see 8in sufficing for a number of years, four to five, as low voltage parts with thinner epi layers will go to 12 in first.”
www.renesas.com; www.navitassemi.com; www.infineon.com
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
