Renesas moves to chiplets for X5 automotive family
Renesas is adding new foundry partners as it moves to chiplet architectures for its fifth-generation R-Car X5 high performance automotive system on chip.
The chiplet approach will allow automotive OEMs to mix and match in house AI accelerators with third party partner silicon, says said Vivek Bhan, Senior Vice President, Co-General Manager of High Performance Computing, Analog and Power Solutions Group at Renesas.
This follows the roadmap discussed back in August: Renesas moves away from uncancellable contracts as it moves to chiplets for gen 5 R-car.
The R-car chiplets will be entirely new, rather than repackaging the fourth generation devices such as the V4HG that is currently entering production, says Bahn and comes as Renesas is restructuring its senior management team, which will see Bahn take over at SVP and General Manager of High Performance Computing next year, responsible for the custom and application-specific high computing products.
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“V4H is ramping up for production now and Gen 5 is a completely different architecture implementation so it is absolutely not taking an V4H approach, there is a significant upgrade in In the process technology and architecture for the X5 family with the x5x, x5M and x5L,” he said.
The chiplets will be built with ‘leading edge FinFET process technology’ he says, which puts the chips at around 5nm as 3nm and below uses gate all around (GAA) technology. “We will be a leading automotive supplier in the process technology,” he said
“We are looking at other fabs in addition to the traditional fab we use for geographical and political issues so some members of the Gen 5 family would be flexible to provide flexible capacity for our customers,” he said.
However Bahn would not comment on the choice of ARM cores, non-volatile memory and connectivity such as gigabit Ethernet for the chips, even though the tools and virtual models will be available from Q1 2024 with new products released from 2024 onward following this roadmap.
“With R-Car Gen5 we will offer chiplet options and we have internal capabilities we are developing for the 2027 timeframe and there is a follow up roadmap to expand Gen 5 further. We have the interfaces and we have the tools to model the thermal, noise, EMI and we are bringing in chiplets with Gen5 in a manner where the chiplet capabilities are enhanced as we go forwards.“
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Automotive OEMs have a range of deals with AI accelerator chip designers, so the chiplet approach potentially allows Renesas to still deliver more integrated central controllers to those customers.
“We are offering an open and flexible architecture and the customer OEM can use our controllers that connect our in house accelerators very well through optimised interconnect and in addition there is flexibility to add third party AI accelerators for unique differentiation,” he said.
The company also has high level plans for two ARM-based automotive microcontroller ranges from 2024. The crossover MCU series is aimed at domain and zone electronic control units (ECU) in next-generation E/E architectures in automobiles to close the performance gap between traditional MCUs and the advanced R-Car SoCs. This is expected to be based on the ARM Cortex-M85 high performance microcontroller which Renesas has had in silicon for two years now, but Bahn declined to comment when asked directly.
A separate MCU platform is being developed for the vehicle control market.
“The market is going through a significant change in architecture towards a more centralised zonal structure from a domain-based architecture,” said Bhan. “Secure communications is still an issue and we see a lot of CAN FD being implemented. With zonal we will see more in vehicle ECUs that communicate with IVI and cockpit systems and gigabit Ethernet as well as cloud connections with over the air (OTA) updates.”
“The future will bring more centralisations with four zones driven by a centralised unit and a significant increase in data and compute capability with higher real time performance. We are offering a family that covers the length and breadth of the market form the low end to the high end as well as applications where SoCs are desired down to 16bit microcontrollers with high software reusability from the bottom to the top.”
As part of its roadmap, Renesas plans to offer a virtual software development environment so that engineers can start developing software for the new devices before silicon is available.
“This roadmap comes after years of collaboration and discussions with Tier 1 and OEM customers,” says Bhan. “What our customers have been telling us is that they need to be able to accelerate development without compromising quality. This means they must design and verify their software even before hardware arrives.”
Samples of the Gen 5 chips is planned for late 2024 next year for both SoC and MCU with a plan for production in the 2027 timeframe