Renesas MPU range features vision-optimized AI accelerator
The first MPU in the series, the RZ/V2M, has been developed to provide a combination of real-time AI inference and power efficiency.
The RZ/V2M takes advantage of the DRP-AI’s power efficiency to consume as low as 4W (typ.) of power. The low power usage gets rid of the requirements for heat sinks and cooling fans and allows RZ/V2M to be integrated into smaller devices and expanding the incorporation of AI in embedded systems.
RZ/V2M also integrates an imaging signal processor (ISP) which can process high-resolution 4K pixels at 30 frames per second. The ISP features high dynamic range (HDR) functionality that can easily handle images with large differences between brightness and darkness, noise reduction functionality, and distortion correction functionality to boost AI recognition accuracy. That functionality produces clear images regardless of factors, such as the weather, time of day, or installation location.
The DRP-AI vision-optimized AI accelerator is IP that was taken from the DRP built into the RZ/A2M and improved. The IP was originally developed for jobs like reading 2D barcodes and iris recognition. To boost the operation processing capabilities, the DRP functionality has been combined with an AI-MAC (multiply and accumulate) circuit. This makes it ideal for applications that require AI inference. The new IP core can process AI with approximately 10 times the power efficiency of the DRP, putting it in the 1 TOPS/W class. It is possible to dynamically change the DRP configuration every clock cycle, allowing the DRP-AI to flexibly support evolving and advancing AI algorithms. In the future, Renesas will offer the DRP-AI Translator, a tool dedicated to DRP-AI based development and ease the implementation of learned AI models into embedded devices.
More information
https://www.renesas.com/products/microcontrollers-microprocessors/rz/rzv/rzv2m.html
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