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Renesas samples Flash MCUs with 40 nm leading-edge geometries

Renesas samples Flash MCUs with 40 nm leading-edge geometries

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By eeNews Europe



Renesas now announced to start shipping samples of automotive Flash MCUs that adopt both the new leading-edge 40nm process for Flash MCUs as well as the new split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memory in Q2/2013. Key features of these technologies include faster memory content read-out and high rewrite durability.

The higher memory speed is owed to the fact that the sense amplifier used to read the data in a memory cell can largely cancel the offset voltage. The rewrite durability is based on a current-adjusting mechanism in the memory cell during the write and erase process, effectively reducing the voltage stress applied to the cell.

Using these new technologies, Renesas has prototyped both 4 MB program storage flash memory and a 64 KB data storage flash memory fabricated in a 40nm generation process, and has achieved operation at over 160 MHz and high readout speed of 5.1 GB per second – the industry’s highest speed for program storage flash memory. Previously, Renesas verified operation at up to 120 MHz in its 40nm generation process products. Leveraging these new technologies, Renesas has now verified a 33% characteristics improvement. Also, in data storage flash memory, this technology achieved 10 million rewrite cycles, a critical issue in automotive MCUs, even under the high-temperature conditions of Tj = 170°C. This indicates that Renesas 40nm automotive flash memory has great potential in terms of rewrite cycle counts.

Renesas is hopeful that using this flash memory circuit technology can contribute significantly to creating automotive flash memory that provides even higher performance and reliability.

For more information visit www.renesas.eu.

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