Researchers take FRAM from 130 to 28 nm in a single leap
Indeed, smashing all prior research claims on FeRAM and scalable to geometries an order of magnitude smaller than today’s 130nm FeRAM commercial offerings, the results are so promising that they are being included in the current version of the International Technology Roadmap for Semiconductors (ITRS).
A result of a sub-project called ‘Cool Memory’ at Saxonys’ cluster Cool Silicon, the technology relies on newly found ferroelectric effects in doped Hafnium oxide (HfO2). Considering that Hafnium oxide is already commonly used as a high-k gate dielectric in CMOS transistors, the processes are pretty much already in place for its ferroelectric variant, readily scalable with CMOS transistors.
So why look at doped Hafnium oxide in the first place? We asked Dr. Thomas Mikolajiick, Professor for Nanoelectronic Materials and Director of the NaMLab at TU Dresden, coordinator for Cool Silicon.
“This research goes back to 2007 at DRAM maker Qimonda, when a PhD candidate Tim Böscke was doing research to improve HfO2 as a high-k dielectric for capacitors in dynamic random access memories, using dopants to stabilise the material”, explained Mikolajiick. “At certain dopant concentrations and under specific treatments, Böscke noticed that strange peaks occurred in the CV characteristic of the material, and that it behaved as a ferroelectric. This was totally unexpected!”
At that time, Qimonda’s resources were already shrinking (the company went out of business in 2009), but further investigation was performed at NaMLab, historically created as a joint venture between Qimonda and the University of Technology of Dresden (TU Dresden), do development work on FeRAM.
Back in 2009, there was still a lot of work to do, notably to make sure that the effects being observed were not just parasitics.
“We’ve spent the last four to five years characterising the material’s properties and tuning its parameters to make it applicable to FeRAM devices” told us Mikolajiick. “The ferroelectric effects in doped orthorhombic HfO2 were further corroborated through computational simulation at imec, among other labs”.
“The next step was to convince GlobalFoundries to integrate FE-HfO2 in its CMOS process, and the first samples we have already outperformed all other FeRAM technologies and other non-volatile memories at a comparable node”.
Fig. 1: Comparing gate-stack structures at the 28nm node – a perovskite-type FeFET, a HfO2-based FeFET and a FinFET cell design.
So far, FeRAM manufacturers such as TI, Ramtron (recently acquired by Cypress) and Fujitsu are all using lead zirconate titanate (PZT) as the ferroelectric material in one-transistor one-capacitor memory cells. But none of them have been successful in scaling PZT beyond 130 nm, because the perovskite-type material is notoriously difficult to deposit and its FE-properties degrade at reduced thickness.
In contrast, the researchers have shown that FE-HfO2 exhibits stable ferroelectric properties at film thicknesses in the nanometer range (5 to 30 nm), which could make ferroelectric field-effect transistors (FeFET) a suitable alternative for non-volatile memory (1T FRAM) in highly integrated 2D or even 3D CMOS designs.
Mikolajiick expects the technology to displace NOR-Flash in embedded memory applications, highlighting that the integration of such FeFETs RAMs is much simpler, requiring only three extra steps versus seven to 10 extra layers for floating-gate based NOR-flash devices.
And again, hafnium oxide is readily available as high-k material in today’s CMOS processes, so it is only a matter of adding another gate oxide layer, albeit a ferroelectric one.
In prior research, the Namlab was also able to demonstrate significantly faster operation speed with program and erase times in the nanosecond range and lower voltage operation.
“Typical technologies currently used for non-volatile memory are based on the principle of charge-storage,” Mikolajick says. “This has several disadvantages. Writing, for instance, requires high voltage and is very energy intensive. Due to the high voltage, certain circuit parts for controlling memory cannot be reduced to desired sizes which renders such memory inefficient for small and medium storage densities.”
In comparison, the ferroelectric material in the FeFET can be brought into two different polarisation states by means of electric charges, and switching requires very little energy. Data retention measurements performed at 125ºC during a thousand hours proved the longevity of the saturated memory state, the device remaining operational at temperatures as high as 185°C.
In terms of cost-competitiveness, the new memory should enable significant cost-savings according to Mikolajiick, since it reduces both process and material costs and it also scales down beyond any other type of memory so far, without any exotic 3D design intervention. The researcher reckons that such a memory may turn out to be 50% cheaper than competing technologies.
Fig. 2: Micrograph of the Fe-HfO2 structure.
In a first batch produced at the Frauhofer IPMS Center for Nanoelectronic Technologies in collaboration with GlobalFoundries, the researchers have tried various cell arrangements to test different array architectures, mostly variation of NOR-type architectures.
Next on the lab’s roadmap is to further reduce the operating voltage, bringing it down as low as possible to reduce the sizing and footprint of peripheral driving circuitry and also to make the devices run faster.
Namlab acquired the IP before Qimonda went bankrupt and has now applied for patents on FeRAM memory using FE-HfO2, but Mikolajiick declined to comment on future licensing strategies.
Cool Silicon; www.cool-silicon.de