RISC-V chip designed with open source tools

RISC-V chip designed with open source tools

Technology News |
By Nick Flaherty

Twelve students in Denmark have designed a RISC-V dual core chip with open source software. The chip is being manufactured in the United States at no cost through a Google initiative with foundry Skywater.

The students are on a specific chip design course at the Denmark Technical University (DTU), the first time the university has taught the subject and the first time that open source tools have been used.

The university is highlighting the European Chips Act as stimulating the need for more chip designers in the region.

Analog chip designer Jørgen Kragh Jakobsen at IC Works suggested that Martin and Luca set up the special course to increase young people’s interest in chip design and helps out on the course.

“We need innovation in this area. And the special course here is the first generation of some chip designers working with open source tools. We have not seen that before. And it will explode over the next few years,” said Jakobsen.

Related articles

The dual core chip uses a 32bit RISC-V core and Patmos, a time-predictable multi-processor platform created at DTU. While Patmos can drive time critical processes such as rotor blades on a drone, RISC-V can take care of processes where time is not crucial.

The open source tools are part of the Skywater 130nm Process Design Kit (PDK) with a complete Apache 2.0-licensed open source RTL2GDS design stack called openLANE developed by Efabless. A standardized test harness is open and freely available and allows verification results to be easily and cost-effectively replicated. 

“For years, we have talked about open source software. Now comes open source hardware. It is groundbreaking that we can use free tools to design the chip. Because usually, it is so expensive to buy licenses for the various tools you use to make a microchip that only companies have had the opportunity to do so,” said Professor Martin Schoeberl. He leads the course together with Assistant Professor Luca Pezzarossa.

“It is impressive and inspiring to see how a relatively small group of BSc students can work together on the difficult challenges associated with the chip design process, and produce concrete results in such a short amount of time. In addition to the chip design process, the students learn the value of constructive teamwork, which I believe is a fundamental skill for future engineers,” says Luca.

“I think I have to work with chip design, and therefore the course is a nice way to get some insight into the area. We are all beginners and learn in step with each other and get an overall picture of what it is all about,” said student Christa Skytte Jensen (above).

The DTU microchip is based on a dualcore system with two different processors, RISC-V 32-bit processor, and Patmos, a time-predictable multi-processor platform created at DTU

openLANE tools on Github

Other articles on eeNews Europe



If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News


Linked Articles