RISC-V power controller for supercomputer chip

RISC-V power controller for supercomputer chip

Technology News |
By Nick Flaherty

The European Processor Initiative (EPI) has developed a dedicated power controller based on the RISC-V open instruction set architecture

“Given the importance both of reducing the carbon footprint of future generation computing systems and enabling higher computation capabilities in post-Dennard scaling electronics, energy-efficient computing has been a key consideration in EPI from the outset,” said the project. Dennard scaling, also called MOSFET scaling, sees the active power density of transistors remaining constant despite the smaller size. However the increase in static power losses at smaller geometries for high performance computing processors is part of the ‘post-Dennard’ challenge.

To address this challenge, the open-source, RISC-V based power controller was designed by University of Bologna and ETH Zurich and integrated into the Rhea processor design that is now at the RTL stage. This also uses RISC-V processor cores.

Atos and E4 Computer Engineering have also designed and manufactured the Voltage Regulator and Management reference platform using power technology from STMIcroelectronics to test the Board Management Controller in a field-programmable gate array (FPGA).

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