Samsung, Cadence tout collaboration on SoC

Samsung, Cadence tout collaboration on SoC

Business news |
South Korea's Samsung Electronics Co. Ltd., has said its foundry business is now in initial production of Ambarella's 32-nm HD digital camera SoC, built using Samsung's gate-first high-k metal gate (HKMG) technology.
By eeNews Europe

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According to Ana Hunter, vice president of Samsung’s foundry division, the production is the result of extraordinary collaboration between Samsung, Ambarella, EDA vendor Cadence Design Systems Inc. and IP vendor ARM Holdings plc.

"It’s an example of what we can achieve by working together," Hunter said. Samsung supports many foundry customers, some of which ask Samsung to get involved in the back-end of the design flow, and others who prefer to do things internally, she said.

The Ambarella A7L SoC, currently in production on Samsung’s S1-Line in Giheung, South Korea, was built with a complete Cadence design flow—including the company’s Encounter digital implementation platform and its Incisive verification platform—and includes ARM’s Cortex processor and Artisan physical IP, according to the companies.

Chi-Ping Hsu, senior vice president of R&D at Cadence’s Silicon Realization Group, said the collaboration on the Ambarella A7L SoC recalls the days before the fabless-foundry model evolved, when integrated device manufacturers (IDMs) dominated the semiconductor industry. Companies the size of Ambarella—a startup that filed for its initial public offering in June—generally don’t have the resources to implement the advanced design techniques or the access to the cutting edge manufacturing technology that Ambarella used for the A7L, Hsu said.

"I think the difficultly of making things like this SoC work, especially at advanced tech nodes, requires significant resources that usually don’t reside in one place," Hsu said.

Hsu said he is seeing a rise in this type of multi-company collaboration, where companies are working closely together to approximate the vertical integration of IDMs.

Hsu added that he was very impressed with Ambarella and Chan Lee, the company’s vice president of VLSI. "They applied all of the latest and greatest design techniques," Hsu said. "Stuff you would assume is only available to IDMs."

Ambarella’s SoC features intelligent power shutoff and sleep modes, according to the companies.

The collaboration on the Ambarella project took place at Samsung’s foundry design center with engineers from all three companies working side-by-side on the Ambarella A7L SoC design, which included several million logic gates and scores of Ambarella’s custom proprietary high speed mixed signal blocks, the companies said. Ambarella used Samsung Foundry’s full turn-key offering, including manufacturing, test and packaging, the companies said.

In advance of the A7L project, as part of its ongoing customer shuttle program, Samsung assisted in porting all necessary Ambarella IP to its 32-nm HKMG process technology to ensure that the Ambarella proprietary IP was pre-verified in the new node, Samsung said. Samsung also provided silicon-proven ARM Artisan optimized logic and memory IP, the company said.

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