Samsung releases PDK for 3nm gate-all-around processes

Samsung releases PDK for 3nm gate-all-around processes

Technology News |
By Peter Clarke

The company is also moving up the arrival of its 3nm process to 2020/2021. A year ago Samsung was saying the process would go into production in or after 2022 (see Samsung to introduce nanosheet transistors in 3nm node).

This movement puts Samsung in the lead in terms of adopting the horizontal nanosheet style of transistor manufacture that has been widely tipped to follow on from the FinFET at the leading edge of transistor manufacturing.

Comparison of FinFET and GAA FET showing increased flexibility of drive current. Source: Samsung Foundry.

Samsung said designers can expect a circuit implemented in its 3nm process to occupy 45 percent less area, consume 50 percent less power and deliver 30 percent more performance, when compared to the 7nm FinFET process just coming in to production.

FinFETS have improved performance at the leading edge by increasing the influence of the gate on the semiconductor channel by wrapping it round three sides of the channel. The next evolution is held to be creating gate-all-around structures. This is improves performance and allows a reduction of operating voltage. This proved hard to get below 0.75V with FinFETs, Samsung said. In the 3nm GAA process this can be reduced to 0.7V.

MBCFET for multi-bridge channel field effect transistor is Samsung’s version of the GAA architecture.

One of the advantages of the GAA, and the reason the arrival of the PDK is important, is that the GAA is much more flexible than the FinFET. Not only can multiple nanosheets be included in the transistor to increase the drive but so can the width of the nanosheets.

Next: Four widths

Samsung has included four different nanosheet widths in its PDK. Transistor designs that are focused on low power will use narrower nanosheets while high-performance transistors or those with high fan-out can use wider sheets. But these widths are part of a continuum.

The company has already said that the 3nm process will come in two variants – 3GAAE and 3GAAP – standing for gate all around early and plus. These names appear to have been truncated to 3GAE and 3GAP.

According to reports Samsung expects its 3GAE process to see first tape outs and so-called risk production in 2022, with volume manufacturing late in 2021. The 3GAP process will be optimized for performance with risk production in 2021 and mass production in 2022, the reports said.

Related links and articles:

News articles:

Samsung to introduce nanosheet transistors in 3nm node

TSMC declares 5nm process ready for design

EUV lets TSMC shrink chip manufacturing process to 6nm

TSMC preps for ‘chiplet’ style manufacturing in 2021

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