Samsung, TSMC team up on HBM4 DRAM
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Samsung and TSMC are teaming up to produce a bufferless high bandwidth memory (HBM) DRAM, according to The Korea Economic Daily, quoting Dan Kochpatcharin, head of ecosystem and alliance management at TSMC.
Kochpatcharin was speaking at the Semicon Taiwan 2024 Forum last week, KED said. It is reported to be the first time that Samsung and TSMC have teamed up on memory.
The report added that a bufferless HBM4 will have 40 percent higher power efficiency and 10 percent lower latency than existing models. HBM has been widely adopted for AI computing.
In foundry logic Samsung is competitor with TSMC but the Taiwan company does not make DRAM. However, the adoption of multi-die packaging and so called chiplet advanced packaging for AI processors collaboration is increasing.
SK Hynix, Samsung and Micron are all introducing HBM3E DRAMs with plans to introduce the HBM4 format in 2025. SK Hynix recently announced that it intends to develop products with 30x the performance of high-bandwidth memory (HBM) DRAM, and offer customer-specific products.
Samsung’s collaboration with TSMC will deliver “customized chips and services” requested by clients like Nvidia and Google, KED said.
While Samsung is capable of providing comprehensive HBM4 services, including memory production, foundry and advanced packaging, it hopes to leverage TSMC’s technology to secure more clients, KED reported sources saying.
The move is part of Samsung’s attempts to fight back against rival SK Hynix which has made itself leading HBM supplier with 53 percent of the marker, compared to Samsung’s 35 percent.
Related links and articles:
SK Hynix plans 30x improvement on HBM with custom variants
JEDEC preps finalization of HBM4 standard
Samsung denies HBM chips have failed Nvidia tests
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