Secure silicon IP cores offer tailored security configurations
Purpose-built for security, the Rambus CryptoManager Root of Trust family is a series of fully programmable, hardware-level secure silicon IP cores that isolate and secure sensitive code, processes, and algorithms, from the main processor cores. The family offers tailored configurations that are designed to allow chip designers to optimize main processors for high performance, while relying on the root of trust to perform security processes.
“Security is a mission critical imperative for SoC designs serving virtually every application space,” says Neeraj Paliwal, vice president of products, cryptography at Rambus. “The Rambus CryptoManager Root of Trust family offers tailored secure silicon IP solutions which chip architects can incorporate to meet the specific security needs of their designs.”
The CryptoManager Root of Trust enables secure boot and runtime integrity checking, remote authentication and attestation, and hardware acceleration for symmetric and asymmetric cryptographic algorithms. It features a layered security model, Federal Information Processing Standards (FIPS) 140-2 certified crypto accelerators, and multiple roots of trust to support independent privilege levels, enabling it to serve a wide range of applications.
Within the product family, seven standard configurations address the specific security requirements and certification standards of different end markets. The RT-730 automotive design offers an ISO-26262-2018 ASIL-D-ready implementation, targeting vehicle-to-vehicle and vehicle-to-infrastructure (V2X), advanced driver-assistance systems (ADAS), and infotainment uses.
For cloud, AI, and ML accelerator chips, the RT-630 helps secure valuable training models, and training and inference data. For government-focused chip designs, the RT-650 offers a design that targets FIPS 140-2 Cryptographic Module Validation Program (CMVP) certification with Suite B accelerators. The RT-660 extends the functionality of RT-650 with the addition of Differential Power Analysis resistant cryptographic cores.
A reference SDK allows integrators to build secure boot, secure firmware updates, and secure applications, with provided examples and references. Available evaluation boards and QEMU allow chip designers to easily evaluate the CryptoManager Root of Trust and secure applications.
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