Security goes multi-core
The XLP316S multi-core, multi-threaded processor integrates 16 NXCPUs, and features a quad-issue, quad-threaded and superscalar out-of-order processor architecture capable of operating at up to 2.0GHz.
The XLP316S will be manufactured in the advanced 40nm process, and is targeted to offer unparalleled performance of 20Gbps and 30 million packets-per-second (Mpps) for converged data plane and control plane processing in advanced network security applications.
Additionally, the 16 NXCPUs are fully cache and memory coherent for software applications to seamlessly run in Symmetric Multi Processing (SMP) or Asymmetric Multi Processing (AMP) modes.
In addition to the 16 NXCPUs, the XLP316S processor integrates the fourth-generation of NetLogic Microsystems’ NETL7 knowledge-based processor technology to accelerate deep-packet inspection (DPI) and content processing functions at 10Gbps throughput, as well as 10Gbps hardware acceleration engines for all major security encryption/decryption protocols.
The NETL7 knowledge-based processing technology features the Intelligent Finite Automaton (IFA) architecture which delivers significant performance, power and cost advantages, and natively performs stateful cross-packet inspection in hardware. Furthermore, it integrates on-chip memory to provide ultra-low latency access to on-chip signature databases, allowing the processors to accelerate complex and iterative content inspection while eliminating the need to provision for the high-latency and costly off-chip memory that are required by competing solutions.
The XLP316S processor features NetLogic Microsystems’ high-speed, low-latency Enhanced Fast Messaging Network to enable efficient, high-bandwidth communication among the 16 NXCPUs and to support billions of in-flight messages and packet descriptors between all on-chip elements.
The XLP316S multi-core processor offers a tri-level cache architecture with over 6 Mbytes of fully coherent on-chip cache which delivers 40 Tbps of extremely high-speed on-chip memory bandwidth.
The XLP316S processor also incorporates 2 channels of 72-bit DDR3 interconnects yielding an aggregate of over 200 Gbps of off-chip memory bandwidth. To complement the 16 NXCPUs, the XLP316S processor offers fully-autonomous processing engines that provide independent and complete offload of certain network functions from the NXCPUs, including encryption/decryption/authentication, ingress/egress packet parsing and management, packet ordering, TCP segmentation offload and IEEE 1588 hardware time stamping.