Selecting a PWM controller for step-down conversion
Selecting a PWM controller has become less straight forward as leading edge DSPs, FPGAs and CPUs run on increasingly lower supply voltages and consume higher current. Sub 1V voltages are becoming ubiquitous while intermediate bus voltages have stayed the same or increased, depending on the application. System frequencies also have steadily increased to support smaller inductor and capacitor (L&C) filtering. Last year’s 500kHz is today’s 1MHz.
In high voltage applications where a lower output voltage is required, power supply designers have traditionally relied on modules that increase system cost, or two stage DC/DC solutions that increase solution footprint and complexity. This article highlights the trends influencing narrow on-time point-of-load (POL) conversion and compares the typically used current mode control architectures. A hybrid valley current mode (VCM) architecture with adaptive slope compensation is examined, including its use in a new 60V synchronous buck controller able to deliver stable operation over a wide range of Vin and Vout combinations, and low duty cycle that allows a direct step-down conversion from 48V to a 1V point-of-load.
The Need for Narrow On-Time POL Conversion
A buck converter is the most widely used power supply topology, and recent trends indicate that next generation switching controllers must be able to provide stable and efficient operation at very small duty cycle. While the current mode control approach offers many advantages compared to voltage mode control, it has its own limitations depending on the application requirement, particularly in terms of duty cycle limits.
Generally, power delivery systems in telecommunication and industrial applications are based on multistage conversion. There has been a continuous power delivery system shift with POL input voltage increasing over time from 3.3V to 5V to 12V. With the increase in power requirements, the use of 12V rails is now common, while 3.3V rails are rarer. This trend towards higher input voltages is due in part to I2R (current to resistance) power losses and associated issues in low voltage traces due to the higher current.
More recently, the trend is moving toward much higher voltages, such as 24V~42V for industrial applications, and 48V for telecom. Consistent technology improvements have made it possible to control narrow pulses. At the same time, new studies show that a higher input voltage enables higher overall efficiency, lowers system cost and contributes to system reliability by reducing distribution path temperature.
Another factor driving the requirement of a narrow PWM pulse is the need for higher switching frequency, which in turn results in higher power density. Operating power supplies at a switching frequency of 1MHz has become common practice. In fact, the switching frequency needs to be above 1.8MHz in automotive infotainment applications to avoid the AM frequency band. A 12V to 1V power conversion at 1MHz would still need to generate a 83ns pulse.
Limitations of low duty cycle operation
An ideal buck convertor can generate any voltage lower than Vin down to zero, However, in practice, there are many limitations such as the reference voltage, internal or external circuit losses, and most importantly, the type of modulator used to generate the control signal. Given a particular input voltage, the reference voltage is the most obvious limitation preventing the controller from covering the entire range 0% to 100%. Most obvious is the reference voltage:
This indicates that the output cannot be regulated below the Vref voltage. The second major limiting factor for the minimum Vout is the minimum on-time of the controller. For a given input voltage (Vin), minimum Vout can be expressed as:
For switching frequency (Fs), the on-time of the upper MOSFET will be:
The control method used by a controller largely drives the minimum on-time it can control. Some intentional delays inside the gate drive circuit, such as blanking time, also affect the minimum on-time. In a typical current mode PWM controller, the size of the PWM pulse is determined by the output of the error amplifier and the inductor current signal as shown in Figure 1. The current loop senses the inductor current signal and compares it to the VCOMP reference to modulate the PWM pulse width. Since the current loop will force the inductor peak or valley current to follow the voltage error amplifier output, the inductor will not appear in the voltage control loop. The double pole LC filter becomes a single capacitive pole structure for the voltage loop. A simple type 2 compensation is enough to stabilize the voltage loop.
Figure 1: A simple current mode control architecture
Suitable modulators for narrow on-time operation
Peak current mode control is one of the most commonly used architectures, and while it’s well understood and offers reliable control techniques with multiple advantages, it exhibits significant shortcomings when narrow on-time operations are required. In peak current mode, inductor current information is sensed across the upper MOSFET. Figure 2 shows typical current waveforms in the upper and lower MOSFET in relation to the PWM signal. The turn on event of the upper MOSFET generates a significant amount of ringing due to different parasitics inside and outside of the MOSFETs in the turn on loop. This ringing can send erroneous signals to control circuitry and falsely terminate the PWM signal.
To resolve this, peak current mode switching controllers ignore this initial ringing by using blanking time before sensing the inductor current. Typically, a blanking time of 150ns to 250ns is employed. This blanking time requirement will not allow peak current mode controllers to regulate a very narrow on-time power conversion. Even a 12V to 1V power conversion would be difficult to regulate at 600 KHz frequency, which translates into less than 140ns minimum on-time.
Valley current mode control
An alternative is valley current mode control, which easily overcomes the blanking time shortfall of peak current mode control. In valley current mode control, the inductor current signal is sensed during the off-time of the upper MOSFET, avoiding the upper MOSFET ringing. This solves the problem of controlling very narrow on-time PWM pulses. However, valley current mode comes with its own set of limitations.
Figure 2: Buck converter waveforms depict signal sense location in current mode control architectures
Two major issues with valley current mode control are sub-harmonic oscillation and poor line regulation. Sub-harmonic oscillation is a common problem with any current mode control. It occurs in peak current mode control as well, but at more than 50% duty cycle. For valley current mode, the reverse is true.
The sub-harmonic oscillations in current mode controllers (both peak mode and valley mode) are preventable using slope compensation. However, fixed slope compensation cannot handle all duty cycles and inductors. The sub-harmonic oscillation problem reappears if the duty cycle is far away from the assumed value used in the slope compensation design.
Peak current mode control
Another option is emulated peak current mode control, a variant of peak current mode that avoids the blanking time limitation. It overcomes the upper MOSFET ringing by measuring the valley current information across the lower MOSFET. This valley current information is then used to emulate the inductor upslope to obtain the peak current information.
As in peak current mode control, emulated peak current mode also suffers from sub-harmonic oscillation and needs slope compensation. This slope compensation is derived from the emulated peak current signal. Though emulated peak current mode is designed to have the benefits of both peak current mode and valley current mode control methods, its shortcomings are mostly due to a lack of inductance information in the control loop.
The best of both modes
Valley current mode with adaptive slope compensation is a way to overcome the shortcomings of traditional valley current mode control. An optimized adaptive slope compensation circuit can prevent the sub-harmonic oscillation for all duty cycles. This adaptive compensation and inherent capability of low duty cycle operation enables a controller with this architecture to operate at very high switching frequency.
Intersil’s ISL8117 buck controller is an example of a valley current mode control with low side MOSFETs Rdson, valley current sense and adaptive slope compensation. As shown in Figure 3, the ISL8117’s ramp signal adapts to the applied input voltage to improve the line regulation. A unique implementation of valley current mode and the optimized slope compensation resolves the shortcomings of traditional valley current mode controllers. Its unique control technique allows it to support a very wide range of input and output voltages. In essence, it is a hybrid between voltage and current mode control, displaying advantages of both modulation architectures.
The ISL8117 can operate from any voltage between 4.5V and 60V, and its output can be adjusted from 0.6V to 54V. It has an adjustable frequency range of 100kHz to 2000kHz and can produce minimum on-time of 40ns (typical). With a minimum on-time of 40ns, the controller can generate 1V output from a 12V bus at 1.5MHz. It is also capable of generating a 1V supply from a 48V source at lower frequency. Figure 4 shows the transient from a stable 48V to 1.2V conversion. In systems susceptible to a particular switching frequency noise, the ISL8117 can be synchronized to any external frequency source to reduce radiated system noise and beat frequency noise mitigation.
Figure 3: Internal control block diagram of ISL8117
Figure 4: Transient response of 0A to 6A, 6A to 0A from a stable 48V to 1.2V converter
With this synchronous buck controller, engineers can design a complete DC/DC buck conversion solution with only 10 components, including MOSFETs and passives, and achieve up to 98% conversion efficiency with 1.5% output voltage accuracy. The ISL8117’s low pin count and layout friendly pin architecture, as seen in Figure 5, also minimizes the number of overlapping traces, further improving power supply performance.
Figure 5: Typical application of ISL8117
Conclusion
Modulation control modes each come with their own set of limitations but recent innovations, such as the ISL8117 60V buck controller with its hybrid VCM and adaptive slope compensation, offer a more flexible and easier to design power supply solution. The ISL8117 enables system designers to remove an intermediate conversion stage to achieve better power efficiency in a smaller footprint, while lowering system costs and increasing reliability.
References
- Learn more about the ISL8117.
- Get the ISL8117 datasheet.
- Watch a video overview of the ISL8117.
- Watch a video of the ISL8117 evaluation and demo boards.
About the Author
Dhananjay Singh is a Product Marketing Manager for Industrial & Infrastructure Products at Intersil Corporation. He is responsible for research, definition, development and marketing of power products for the Industrial market. Prior to joining Intersil, Mr. Singh was a Design Engineer at both JVC in Japan and at MIRC Electronics, Ltd in New Delhi. He holds a Master of Technology degree in Electrical, Electronics and Communications Engineering from the Indian Institute of Technology (Banaras Hindu University) in Varanasi, India.
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