SemiFive and Synopsys to develop chiplet platform for multi-die designs
SEMIFIVE is collaborating with Synopsys to develop a cutting-edge high-performance computing (HPC) platform that integrates its CPU chiplet with a third-party I/O chiplet into a unified package.
The SEMIFIVE HPC chiplet platform will offer notable advantages over traditional chiplet platforms to reduce cost, optimize performance, and enable development flexibility. This platform will advance semiconductor technology, leading to the creation of versatile and customized chiplets to meet the diverse needs of HPC customers.
The CPU chiplet, manufactured on 4nm process technology, will include Synopsys UCIe controller and PHY IP as well as other IP. Synopsys’ IP offerings have helped SEMIFIVE achieve multiple generations of silicon success and become a global leader in innovative custom silicon.
SEMIFIVE’s portfolio of optimized SoC platforms are pre-designed and validated on advanced process nodes, allowing customers to improve their overall development efficiency.
“Synopsys and SEMIFIVE are helping companies adopt multi-die designs to address the growing compute demands of high-performance systems,” said Michael Posner, vice president of IP product management at Synopsys. “The combination of Synopsys’ silicon-proven UCIe IP, which has been adopted by multiple hyperscalers, and SEMIFIVE’s extensive SoC platform, helps companies reliably meet their multi-die design requirements and accelerate their development effort.”
“We are confident that chiplets represent the future of silicon design. Our collaboration with Synopsys, particularly using their UCIe IP, is a key factor in ushering in the chiplet era,” said Brandon Cho, CEO and co-founder of SEMIFIVE. “By delivering platforms like the HPC chiplet platform, we will enable our customers to bring innovative, customized solutions to market faster than ever before.”
www.semifive.com
www.synopsis.com
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