Sensing elements for current measurements – Part 2
Introduction
The fundamentals to translating the analog world into the digital domain reduces to a handful of basic parameters. Voltage, current, and frequency are electrical parameters that describe most of the analog world. Current measurements are used to monitor many different parameters, with one of them being power to a load.
There are many choices of sensing elements to measure current to a load. The choices of current sensing elements can be sorted by applications as well as the magnitude of the current measured.
This write up is part two of a three part series (Part one can be seen here) that discusses different types of current sensing elements. The focus of this article is to evaluate a direct current resistance (DCR) sensing architecture that allows for lossless current sense in some power applications. This article explains how to design a DCR circuit for power applications. This article analyzes the drawbacks of the architecture as well as providing a way of improving the current measurement technique through calibration.
DCR circuits are commonly used in low supply voltage applications where the voltage drop of a sense resistor is a significant percentage of the supply voltage being sourced to the load. A low supply voltage is often defined as any regulated voltage lower than 1.5V.
Element 2: DCR
Figure 1: A simple schematic of a DCR circuit.
A DCR sense circuit is an alternative to a sense resistor. The DCR circuit utilizes the parasitic resistance of an inductor to measure the current to the load. A DCR circuit remotely measures the current through an energy storing inductor of a switching regulator circuit. The lack of components in series with the regulator to the load makes the circuit lossless.
A properly matched DCR circuit has an effective impedance with respect to the ADC that equates to the resistance within the inductor. Figure 1 is a simple schematic of a DCR circuit. Before deriving the transfer function between the inductor current and voltage at the input of the ADC, let’s review the definition of an inductor and capacitor in the Laplacian domain.
Equation 1: The admittance and reactance equations for a capacitor and inductor respectively.
Xc is the impedance of a capacitor related to the frequency and XL is the impedance of an inductor related to frequency. ω equals to 2πf. f is the switching frequency dictated by the regulator. Using Ohms law, the voltage across the DCR circuit in terms of the current flowing through the inductor is define by Equation 2.
Equation 2: The voltage equation measured across the DCR circuit.
In Equation 2, Rdcr is the parasitic resistance of the inductor. The voltage drop across the inductor (Lo) and resistor (Rdcr) is the same as the voltage drop across the resistor (Rsen) and capacitor (Csen). Equation 3 defines the voltage across the capacitor (Vcsen) in terms of the inductor current (IL).
Equation 3: The voltage equation for the sense capacitor.
The relationship between the inductor load current (IL) and the voltage across capacitor simplifies if the component selection in Equation 4 is true.
Equation 4: The mathematical relation that enables the DCR to work.
If Equation 4 holds true, the numerator and denominator of the fraction in Equation 3 cancels reducing the voltage across the sense capacitor to the equation represented in Equation 5.
Equation 5: The equation for the voltage across the capacitor when Equation 4 holds true.
Most inductor datasheets specify the average value of the Rdcr for the inductor. Rdcr values are usually sub 1mΩ with a tolerance averaging 10%. Common chip capacitor tolerances average to 10%.
Inductors are constructed out of metal. Metal has a high temperature coefficient. The temperature drift of the inductor value and the parasitic resistance (Rdcr) could cause the DCR circuit to be un-balanced. The change in the inductor value and parasitic resistance could be a result of either self-heating due to current passing through the inductor or environmental temperature rise. Copper has a resistive change of 3.9mΩ/C. The change in inductor wire temperature directly impacts the value of Rdcr. To counter the temperature variance, a temperature sensor could be used to monitor the temperature of the inductor. The DCR can be compensated with knowledge change in inductor resistance.
In Figure 1, there is a resistor in series with the 16 bit ADC, which could be an ISL28023, negative shunt terminal (VINM) with the value of Rsen + Rdcr. The resistor’s purpose is to counter the effects of offset bias current from creating a voltage offset at the input of the ADC.
Assume the circuit in Figure 1 is an ISL85415 buck regulator with a switching frequency of 900 kHz. The inductor value is 22uH inductor with a ±20% tolerance. The inductor and the bypass caps complete the buck regulator circuit such that voltage to the load is stable. The Rdcr is inherent to the inductor. The values of the Rdcr for this example is 0.185Ω typical and 0.213Ω maximum. That is roughly a ±13% variance from inductor to inductor. The value of Rsen for the DCR circuit is chosen as 11.8kΩ. Using Equation 4, the capacitance value of the DCR circuit, Csen, equals to 10nF. Assume the tolerance of the capacitor is ±10%.
Inductor and capacitor values are not tightly control. If a DCR circuit is designed into a system without any additional tuning circuits built in, how do the tolerances of the sense capacitor and inductor effect the current measurement error?
Figure 2: The plot illustrates capacitor and inductor tolerances and their effects on the current measurement.
Designing a DCR circuit without tuning capabilities can result in a current measurement error of up to 35% due to the variance of the inductor and capacitor within the DCR circuit. Figure 2 plots measurement error versus different inductor and capacitor tolerance values. The measurement errors could increase to approximately 50% when including the Rdcr variation.
A simple trimming circuit utilizing a non-volatile digital potentiometers (DCP) drastically improves the current measurement accuracy.
Figure 3: The current measurement can be improved by using a DCP to tune the circuit.
A factory calibration technique to improve the current measurement performance is to apply a known current load in addition to the nominal current load sourced by the regulator. The DCP is trimmed while monitoring the voltage across the sense capacitor (Csen).
In many production applications, the circuits are tested for functionality. A common test is to margin the power supplies by ±10% from the nominal supply value to ensure functionality and proper current draw by the load. Rm combined with the feedback circuitry of the regulator enables the voltage to the load to be margined. Without margining, the regulated voltage to the load is represented by Equation 6.
Equation 6: The regulated output equation to the load. (Without Margining)
Vref is the reference voltage determined by the voltage regulator. Rf and Rg are the gain resistors that are multipliers to the reference voltage. For example, let’s uses the ISL85415 as the buck regulator. The ISL85415 has a reference voltage of 0.6V. The desired regulated voltage is 1.0V. Rf is arbitrarily chosen as 100kΩ. When choosing a feedback resistor, the value should not be too low in value. A higher value feedback resistor prevents unnecessary power dissipation in the feedback circuit. The feedback resistor value should not be too high either; this may result in noise or even oscillation at the regulated voltage node. Using Equation 6, Rg is calculated to be 150kΩ for a 1.0V regulated voltage.
A ±10% margin voltage equates to a 1.1V and 0.9V regulated voltage to the load. To achieve a voltage change of 0.1V at the load, a margining DAC and resistor, Rm, are added to the circuit. This is illustrated in Figure 3. Equation 7 describes the regulation voltage in terms of the margin DAC and resistor, Rm.
Equation 7: The regulated output equation to the load. (With Margining)
Vref, Rf and Rg are previous defined. Vmdac is the margin DAC voltage. Rm is the margining resistor. Let’s assume the regulated voltage is 1.1V when the margin DAC equals 1.0V. Using Equation 7, Rm equals 600kΩ. Using Equation 7 again, the margin DAC voltage, Vmdac, equals 1.2V for a regulated voltage of 1.1V. To save board space, the ISL28023 has a margin DAC with common margining voltage ranges integrated into the chip’s functionality.
The circuit in Figure 3 has a switch and a Rtest resistor in parallel to the load. The purpose of the Rtest resistor is to add a known current to the existing load to allow for DCR inaccuracies to be trimmed out. In an ideal system, the voltage measurement would report out both magnitude and phase. The Rsen trims the DCR circuit until the phase equals 0 degrees. A phase of 0 degrees results in a tuned DCR circuit described in Equation 4.
The current measurement reading is purely resistive as described in Equation 5. The current measurement could still have a measurement error of up to ±13%. The current measurement error is directly due to the variation in the DCR resistance, RDCR. The DCR resistance is calculated by changing the load current by a set amount and measuring the change in the voltage across the sense capacitor. The voltage change measured divided by the change in current equates to the Rdcr value.
A voltage measurement made from an ADC reports out the magnitude of the measurement. The phase is unknown without additional measurements and circuitry. Without knowing the phase of the measurement, the DCR circuit is calculated by trimming Rsen such that the system resistance equals the Rdcr nominal. This described in Equation 8.
Equation 8: System resistance of the DCR circuit.
The procedure for measuring the system resistance is to measure the voltage change across the sense capacitor, Csen, when Rtest is connected and not connected. The value of Rtest should be chosen such that the current change is measureable. Changing the current by 10% of the nominal current is a good current change to design for. If the current change is too high with respect to the nominal current, the resistance of Rdcr will change due to the additional current heating the DCR resistor. A current change too low will result in an unreadable current change.
Suppose the load draws 100mA nominally from the buck regulator. The output voltage is set to 1.1V and the Rtest resistor value is 100Ω. When the switch that is connected to Rtest is enabled, the current sourced by the regulator increases by 11mA. Measure the difference in Vc voltage between the test load connected to the circuit and not connected to the circuit. The difference between the two measurements equals dVc in Equation 8. Dividing the dVc/dIL equals the sense resistance. Adjust Rsen and repeat the two measurements, until the resistance value equals Rdcr(nom). In this case, the Rdcr(nom) equals 0.185Ω.
The Rdcr value varies by ±13%. Since the voltage measured is a magnitude, there isn’t a way to calibrate Rdcr directly. Trimming the Rsen resistor to an effective resistance of 0.185Ω may result in an unbalanced DCR circuit if the actual Rdcr value does not equal 0.185Ω. An unbalanced circuit results in an imaginary component when solving for the effective resistance in Equation 3.
An unbalanced DCR circuit results that has an effective resistance dependent on frequency. How much does a 13% Rdcr resistance variance contribute to the effective resistance value of the DCR circuit?
As mentioned prior, the buck regulator has a switching frequency of 900kHz. Solving Equation 3 for Rdcr equal to 0.213Ω yields a measured Rdcr value of 0.185 – 5.266
0.185 – 5.266*10-5i for an inductor that is 20% low and a capacitor that is 10% high. Rsen value was for 8600Ω for this instant. The imaginary part of the resistance is 0.028% of the real value at a switching frequency of 900kHz. The effective resistance across Csen is constant as long as the switching frequency is constant. Figure 4 graphs the frequency dependence between a mismatched DCR circuit and a matched DCR circuit.
Figure 4: Graph of the sense resistance between a matched and an unmatched and trimmed DCR circuit.
A trimmed DCR circuit with a +13% Rdcr value has a 0.4uΩ or 2.2ppm variance across the switching frequency range of the ISL85415. The change in resistance value is small versus switching frequency.
Summary
A DCR circuit is a lossless circuit that requires little board space to construct. The circuit requires tuning for proper operations. Therefore, extra steps need to be taken at the manufacturing to guarantee proper operation of the circuit. The tolerances of the reactive components can cause large variances in the effective resistance between circuits. Inductors and capacitors have strong temperature coefficients which add to the inaccuracies of the circuit once it is tuned. Overall, the DCR circuit architecture is good for measuring gross currents while maintaining a lossless system for switching regulators.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
