Simplifying safety certification for Arm-based multi-core designs

Simplifying safety certification for Arm-based multi-core designs

By eeNews Europe

Lynx Software Technologies will demonstrate how the company’s LynxSecure Separation Hypervisor can simplify safety certification processes at Arm TechCon.

LynxSecure is available on the Xilinx Zynq Ultrascale+ MPSoC, and the NXP S32V.

At Arm TechCon, Lynx will show the LynxSecure Separation Kernel Hypervisor running on a Xilinx UltraScale+ MPSoC. LynxSecure will run across Cortex-A53 processors, providing secure domains hosting a safety-critical RTOS next to Linux domains running general purpose computing applications. LynxSecure protects against any fault conditions or threats in the GPOS domains from compromising the applications running in the safety domain, which can maintain deterministic behaviour regardless of the performance of the rest of the system.

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