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Single chip G.fast scalable low-power DPU architecture

Single chip G.fast scalable low-power DPU architecture

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By Jean-Pierre Joosting



This market now requires flexible support of different bandwidth and reverse power feed of remote devices from the customer’s residential gateways, and ENETxxZ/99 was tested for reliable provision of such DPU features.

The ENETxxZ/99 family is scalable, with application ranging from the low-end and very low power FPGA to multiport G.fast chassis. The tests showed extremely low power consumption of 2.7-W for SoC combining switch, traffic manager and CPU subsystem.

The G.fast platform provides uplink connection to the service provider’s central office in the network from 2.5 Gbps to 20 Gbps, with 5 Gbps to 40 Gbps data throughput.

ENETxxZ/99 family utilizes Xilinx Zynq series, and leverages the scalable architecture of ENET, the core product of Ethernity Networks. ENET supports advanced functionality matching Metro market requirements, microwave backhaul and novel NFV/SDN concepts, where functions can migrate to cloud platforms.

“Apart from the best price-per-port-per-power, Ethernity’s G.fast platform is ready for next generation software defined networking (SDN), supporting Hierarchical ACL and port virtualization within G.999.1 channelized interfaces, EFM bonding and MEF requirements. We anticipate emerging challenges for broadband communications and provide our customers with the future proof solution” — explains Eugene Zetserov, Ethernity’s AVP Business development.

www.ethernitynet.com

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