SkyWater foundry plans $1.8 billion Indiana wafer fab

SkyWater foundry plans $1.8 billion Indiana wafer fab

Business news |
By Peter Clarke

Specialty foundry SkyWater Technology Inc. (Bloomington, Minnesota) is plannng to build a US$1.8 billion wafer fab in partnership with State of Indiana and Purdue University.

The deal comes in the form of a public-private partnership intended to pursue funding under the US CHIPS Act.

SkyWater is a US-based pure-play semiconductor foundry and is a DOD-accredited trusted supplier, specializing in custom technology development services, volume manufacturing, and advanced packaging capabilities.

The Indiana facility, to be located on the Purdue campus in the Discovery Park District of West Lafayette, Indiana, will provide access to manufacturing process development, volume production and heterogeneous integration solutions that the company currently offers out of its Minnesota and Florida facilities.

CHIPS Act dependent

SkyWater said the commitment to the fab was conditional on the partnership being successful in getting grants defined in the CHIPS Act. Thereafter SkyWater would use its existing co-investment business model to fit out and scale production there.

 “This endeavor to bolster our chip fabrication facilities will rely on funding from the CHIPS Act. Federal investment will enable SkyWater to more quickly expand our efforts to address the need for strategic reshoring of semiconductor manufacturing,” said Thomas Sonderman, CEO of SkyWater, in a statement.

SkyWater did not indicate the manufacturing capacity of the wafer fab, how many people it would employ or provide a timetable for construction of the wafer fab.

A month ago fabless chip company MediaTek Inc. (Hsinchu, Taiwan) announced it would open its first Midwest semiconductor chip design center in West Lafayette, Indiana. MediaTek also shared its intention to create a research partnership with Purdue University to collaborate on engineering talent development and new research on next-generation computing and communications chip design.

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