Smaller, more efficient micro-mirror array generates HD images

Smaller, more efficient micro-mirror array generates HD images

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By eeNews Europe

The 0.3-in. HD Tilt & Roll Pixel (TRP) DLP Pico chipset can generate high-definition (HD) displays from compact electronics, including tablets, smartphones, accessories, wearable displays, augmented reality displays, interactive surface computing, digital signage and control panels. Based on DLP Cinema technology, this new DLP Pico chipset delivers bright, vivid HD image quality, TI says.

The MEMS device uses TI’s TRP DLP architecture and adaptive IntelliBright suite of algorithms to deliver higher brightness and lower power consumption than previous DLP Pico chipset architectures. Additionally, the chipset’s fast switching speeds of up to thousands of times per second enables the smallest true-colour RGB engines with 120-Hz video performance.

TI says it is working with leading developers and manufacturers to bring products to market in 2014 that incorporate the 0.3 -in. HD TRP chipset; comments include those of Edward Tang, CEO of Avegant, "We are already utilising the innovative 0.3 in. HD TRP chipset in our virtual retinal display product, the Avegant Glyph, to beam images directly onto the human eye. We selected this chipset based on its HD image quality, flexibility and power savings."

"This HD chipset represents a major milestone for DLP; we are achieving two times the number of pixels in a 0.3-inch MEMS device with 30% greater optical efficiency and up to 50% power savings on a frame-by-frame basis than our previous architectures," said Frank Moizio, business unit manager of TI’s DLP Pico. "This allows developers to create a wider variety of applications and products in smaller form factors than ever before."

Texas Instruments;

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