SoC battery operation time extended “2 to 5 times”
Wireless communication SoCs, whether BLE, Zigbee, Sigfox, LoRa, or M2M 4G have a duty cycle such that the power consumption in sleep mode dominates the overall current drawn from the battery. For such applications, the design of the “Always-On power domain” (a.k.a AON power domain) is critical.
Minimization of the power consumption of an always-on domain indeed involves paying special attention to the construct of the power regulation network. The selection of the voltage regulator is critical, as it may contribute to more than 50% of the power consumption in sleep mode. The capability of an always-on power domain to operate at very low voltage may significantly lower the power consumption while enabling silicon area and BoM cost savings.
The qLR-Aubrey is a linear regulator with a quiescent current as low as 150 nA, including the reference/bandgap. This voltage regulator supports an input voltage as high as 5.5V (no special process option required) and an output voltage programmable down to 0.55V, i.e. the minimum data retention voltage of RAMs at 55 nm uLP. Embedding a single instantiation of the qLR-Aubrey to supply both the blocks in data retention and the always-on domain saves silicon area and BoM cost while reducing the power consumption of a SoC in sleep mode by up to 80%.
To make such savings achievable, Dolphin Integration provides a complete set of silicon IPs optimized to operate Near Threshold Voltage: standard cell library (SESAME NTV), ultra-low power XTAL and RC oscillators. The Reference schematic (above) is without Dolphin Integration solutions while this digram shows always-on relying on Dolphin Integration Near Threshold Voltage solutions.
Dealing with multiple voltage regulators to supply the same load in different power modes is challenging (risks of short circuits…). Dolphin’s RAR, i.e. Retention Alternating Regulator, combines two voltage regulators which operate alternatively: one during SoC active mode(s) – up to 1A – and the other during SoC sleep mode(s) – up to 1 mA. The switching between the two voltage regulators is fully automatic – activated through a control signal – and is both fast and safe as a Regulator Control Unit is embedded in the RAR.
Depending on whether the target application of the SoC is more sensitive to BoM costs or to power consumption in active modes, SoC designers may select:
– The RAR-iLR-qLR combines a fast transient linear regulator (iLR-Victoria) with an ultra-low quiescent regulator (qLR-Aubrey) for the lowest BoM cost.
– The RAR-eSR-qLR combines a high-efficiency switching regulator (eSR-Niagara) with an ultra-low quiescent regulator (qLR-Aubrey) for the best power efficiency.
Schematic with qLR Aubrey and SESAME NTV
Schematic with RAR-iLR-qLR and SESAME NTV
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AON of reference |
AON supplied with the qLR-Aubrey |
AON supplied with a RAR-iLR-qLR |
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Voltage regulators |
3 LDOs |
2 LDOs |
1 RAR |
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BoM cost |
3 capacitances |
2 capacitances |
1 capacitance |
Voltage regulators of the DELTA library are provided with integration rules, guidelines and specific views, and may be easily and safely embedded, whatever the complexity of the power regulation network and the sensitivity of loads to noise (e.g. RF).
Dolphin Integration; www.dolphin-integration.com
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