Soft management of power system hardware
Power system architects and designers of digital ASIC/FPGA/microprocessor boards may be justified in being a little envious of their colleagues in software engineering if you were to consider the following advantages that the software team has over their hardware colleagues.
– The time delay between writing software code and observing its effect is much shorter than the days or weeks that a hardware board spin takes. The time to market is mostly limited by their coding and testing productivity and less by extraneous factors.
– Software updates are pushed to the customer as-needed to fix bugs and improve field performance. Hardware updates require boards to be recalled for rework.
– Software engineers easily track performance of their code through logged data from the comfort of their cubicles. Performance bottlenecks are quickly identified leading to rapid future improvements. On the other floor, hardware engineers spend days in the lab, hunched over boards with voltmeter and oscilloscope probes.
– Software engineers write one core set of modular code and then adapt it for different customer and market needs. Customised hardware requires component and bill of materials (BOM) changes, risking designs diverging from each other.
Increasing challenges facing power system architects & designers
Exacerbating the situation, tougher challenges face the power system team on modern digital boards as nanometer-scale processor (ASIC, FPGA, microprocessor, DSP) supply voltages continue their downward march below 1V. The tolerance requirements on point of load (POL) supplies are tightening up, approaching 2% to 3%; the error budget includes DC accuracy, ripple and transient excursions during load steps. Note that 3% of a 0.9V supply is just 27 mV. As supply voltages drop and more cores are packed into processors, current levels rise, even exceeding 100A. Maintaining accuracy to a few tens of millivolts at the processor input with one hundred Amperes flowing through the power and ground planes is a daunting PDN (power distribution network) design task.
Simultaneously, there is a push for more efficient use of processing energy to lower data centre utility bills and cooling costs. Server chassis are running hotter with board temperatures approaching 100C. Design cycles are getting shorter but designs need to be refined at the last minute depending on margin test results and also for the unique needs of different markets and customers. Sequencing has been a common requirement on boards with multiple supplies, but those requirements are getting more complex as the number of supplies ranges from 20 to 50, spanning multiple power domains.
Solutions so far
Power management tasks such as sequencing, supervision, monitoring and margining have been handled by an assortment of devices including supervisors, sequencers, ADCs, DACs, amplifiers and microcontrollers. Coordinating these disparate devices to work together takes up most of the design effort. Integrated solutions have generally evolved or descended from supervisors and sequencers with capabilities added for margining, ADC monitoring and EEPROM fault logging.
However, these devices have poor voltage accuracy on trimming, margining and monitoring. There are also system-on-chip (SoC) devices that integrate an array of uncommitted digital gates and logic with ADCs, DACs, comparators and PWM outputs. Lacking any power management architecture, these devices require a lot of programming to perform even the most basic tasks, taking up months of design and validation effort.
The push towards digital management of power systems has led to digital power solutions where the DC/DC converter loop employs an ADC, digital compensator and digital PWM. Due to the inherent quantisation of this sampled system, digital loops generate more noise and ripple in the supply output voltage. They also tend to have slower transient response, poorer accuracy and, at worst, even erratic, unpredictable behaviour. On the other hand, analogue loops are faster, cleaner and much more predictable. Management of multiple supplies requires digital configuration and communication with the POL supply but the supply loop itself can stay analogue to obtain the best of both the analogue and digital worlds.
next page; single-package solutions…
The complete solution
Keeping POL supply trends in mind was a major part of the rationale that lay behind a complete Digital Power System Management (DPSM) solution, architected starting from first principles. The core philosophy is that the supply loops stay analogue, with digital interface and control added in. This is illustrated in Figure 1.
Figure 1. Linear Technology’s DPSM architecture. POL supplies stay analogue with digital communication & control added in.
The DPSM family includes a broad array of interoperable devices with and without built-in DC/DC conversion, as shown in Figure 2. All of these devices communicate with a board controller via the industry standard PMBus interface. The choice of PMBus helps reduce design time by enabling firmware re-use. For those preferring autonomous operation without the need for code development, an engineering-level development software is provided to customise device configuration.
Figure 2. DPSM device types, each offering multiple devices, depending on the number of supply rails to be controlled.
Among these PMBus-compliant devices, Digital Power System Managers are those that wrap around an existing analogue power system. They measure supply output voltages with a 0.25% accurate 16-bit ADC, compare it to a target voltage register and adjust the supply through a 10-bit voltage DAC output fed back to the supply’s feedback or trim pin. The ±0.25% DC accuracy affords plenty of margin for the supply to move during load steps, leading to reduced bypass capacitance requirements and consequent board area savings. Long-term board reliability is improved by the trim servo loop continuously monitoring and adjusting the supply, preventing drift over time and temperature. Unnecessary yield loss during board margin testing reduces due to the precise supply voltage setting. The trim feature also enables tweaking of supply voltages to optimise energy consumed for the given system load. Voltage, current and temperature data provided by the ADC yields powerful insights into system performance with the potential to improve board reliability, predict board replacement and reduce power consumption. Time to market is improved because many design tweaks are accomplished through register configuration changes instead of sending the board out for a fabrication cycle.
next page; fault logging..
The other powerful feature of the Digital Power System Manager is black box fault logging to an internal EEPROM. Failure analysis is dramatically sped up by analysing the last few cycles of ADC monitoring data stored in non-volatile EEPROM memory whenever a fault occurs. The Managers also enable remote diagnostics. When integrated with higher layers of software, it becomes possible to monitor and diagnose the board’s power system from a remote location. Similarly, field upgrades are accomplished by a firmware push. Depending on the device, supply sequencing is achieved through time delays or cascading; tracking supplies are also supported. A 16-channel Digital Power System Manager, LTM2987, is shown in Figure 3. To manage more than 16 supplies, the LTM2987 coordinates with other Managers.
Figure 3. 16-Channel µModule PMBus DPSM with 0.25% accurate trimming, margining & monitoring.
Digital power system managers are suitable for an existing power system with four or more rails. DC/DC controllers with digital power system management are more appropriate when digital control is needed over supply current limit, switching frequency and ramp rate. These devices feature fast analogue current mode control loops for best transient response with the added digital telemetry, configuration and control. Accurate PolyPhase current sharing enables lower input ripple and heat spreading in applications with large currents. μModule (micromodule) systems-in-a-package integrate the switching N-channel MOSFETs, inductor and capacitors for a compact 26A solution, for example, Figure 4.
Figure 4. LTM4676 Dual 13A or single 26A μModule regulator with DPSM.
Digital power system management is a necessity for modern, high performance digital processing boards utilizing a large number of power supply rails. Most solutions on the market have been designed as an after thought to sequencers or come equipped with a bunch of widgets that require extensive programming efforts. The IC designers at Linear Technology have completely thought through this issue to define a family of interoperable products, offering a completely architected, fully qualified and future-proofed solution that eases the hardware engineer’s design burden.
Pinkesh Sachdev is a Product Marketing Engineer at Linear Technology
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