Software tool manages virtual platforms to speed complex design flows
While the concept of a virtual platform – a faithful representation of the hardware of a new design, as a vehicle on which to develop the project’s software, ahead of the availability of the actual hardware – is not new, Magillem believes that there is a “new momentum” in adoption of SystemC/Virtual Prototypes.
Driven a decade ago by the consumer market (smartphones/tablets) with tight time-to-market, virtual platforms were developed to speed up early software bring-up. The VP market, Magillem says, has changed to cover new/adapted markets such as automotive, medical, aerospace, and IoT. The company sees this adoption as happening for three major reasons.
– System companies are becoming more involved in the development of ASICs or FPGAs through their digital transformation process: to differentiate a system, it is not enough to just assemble available IP, they need to create their own ASIC/FPGA and a VP is a solution to specify/verify their requirements, defined as an executable contract, between their various sub-teams or sub-contractors.
– Semiconductor companies are moving up to System level. They deliver end-to-end solutions, not just chips but boards and software. Not only do they integrate more system functions in the chip, but they also increase the supported software stack, now including services; for example, to address the complete safety/security issues driven by IoT. VP is one of the best solutions to manage derivatives and deliver an executable specification to their customers.
Smaller analogue/MEMS semiconductor companies, boosted by the transformed markets (e.g. automotive) or new emerging markets (e.g. augmented reality), look for differentiators to produce their devices sooner, better, and faster. Or, they are forced by their customers (the system equipment manufacturers) to provide a VP of their device.
Magillem adds that it also sees a change in VP usage, as platforms are now being used being to cover:
– Mixed analogue/digital platforms (not just pure digital) including sensors, MEMS, and RF chains
– Smaller platforms (based on micro-controllers)
– Many-core platforms (versus multi-core), for example to model a vehicle including hundreds of ECUs
– System heterogeneous platforms mixing, for example, SystemC and Matlab models.
Sometimes the VP may not even include a processing unit, hence not execute software. VP usage is expanding to cover (in addition to software bring up), hardware IP (or subsystem) validation/verification and this includes:
– Validation from embedded software, where the testbench environment includes a processor fast model, or by directly running software test patterns using the embedded processor of the SoC
– Validation using a hardware test bench (usually coupled with the previous one). The test bench is written in SystemC, generating stimuli and responding to side signals. The test bench can also be based on the UVM-SystemC
– Early system demonstrator; the VP is being more and more used as an early product demonstrator: an executable specification. This is typically used when responding to a call for tender, to illustrate how a future product can differentiate and respond to the requirements. The VP becomes a live specification, that can execute a number of user stories/use-cases, which helps converging faster (before the real implementation starts).
Magillem claims to be the only IP-XACT based VP tool provider, and to offer an EDA independent environment (i.e. re-targetable from one EDA vendor to another), and adds that its tools add capabilities such as the ability to check before simulating (hence saving significant number of simulation runs); the capability to manage and analyze complex designs and configurations; the capability to import any legacy SystemC IP and connect to the major EDA VP tools and software debuggers; and a direct and straightforward link to the RTL design environment.
Magillem; www.magillem.com
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