Soitec is to use its proprietary technologies such as Smart Cut on IME’s pilot production line to run 200mm SiC wafers.
The research collaboration is planned to run until mid-2024 and is intended to contribute towards developing a holistic SiC ecosystem and boosting semiconductor manufacturing capabilities in Singapore and the region.
The collaboration will work on SiC epitaxy and MOSFET fabrication processes for Smart Cut SiC substrates.
“This is a great opportunity for us to partner with Singapore’s Institute of Microelectronics and demonstrate SmartSiC substrate’s scalability to 200mm,” said Christophe Maleville, CTO of Soitec. “As the main beneficiaries of this new process, the semiconductor ecosystem in Singapore will be given the opportunity to validate the superior energy efficiency of the SiC wafers produced through our collaboration,” he added.
A*STAR’s IME has capabilities in heterogeneous integration, system-in-package, sensors, actuators and microsystems, RF and mmWave, power electronics, and medical electronics.
The 200mm SiC pilot line it is establishing aims to validate manufacturing processes and tools on a pilot-line scale before a transition can be made to high-volume manufacturing. A dual purpose of this programme is to perform applied R&D on SiC MOSFET processes and materials such as Soitec’s Smart Cut SiC substrates to pre-position the industry for next-generation SiC manufacturing.
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