Sondrel semi-custom 4TOPS AI design
UK chip design house Sondrel has launched a quad-core semi-custom chip design for high performance data processing including AI or cryptocurrency mining.
Each SFA 300 reference design has four CPU clusters and several SFA 300s can be synchronised via a PCIe interface. Accelerator blocks and/or custom logic can be added for more performance and to reduce the overall power consumption.
The design is aimed at applications such as 8K video, AI, facial recognition for surveillance, smart factories, blockchain servers and medical data analysis.
“An ASIC with four CPU clusters is complex to design,” said Rowan Naylor, a Principal Engineering Consultant at Sondrel. “Moving data around the chip without bottlenecks needs a Network on Chip, a multi-width data path, internal RAM scaled and distributed across the design for optimal performance, and data conflict arbitration. Plus, there are the data security aspects in the Ar®-based security subsystem such as activity/intrusion detection. All this is already in the SFA 300 IP platform, so all that has to be done is integrating in the customer’s IP which cuts down the design time and costs by up to 30 percent.”
The SFA 300 is a framework where different ARM cores can be used to suit the processing power need by each of the four channels of the chip because the interconnects on and off the CPUs are standardised. This standardisation of interconnects on the boundaries of IP blocks and the rest of chip enables most other IP blocks such as memory to be also exchanged as required. Typical performance figures are 4 TOPS (Tera Operations Per Second) for each channel for AI and 400 GOPS (Giga Operations Per Second) for each channel for DSP.
If the processing power required is greater than can be achieved by upgrading the processors, then several chips can be linked together to form a cluster to achieve the required processing power.
“This is the third of our family of IP platforms,” said Graham Curren, CEO of Sondrel. “They are generating huge interest because using them means that each new design is not starting from scratch. We have taken the well-established idea of re-using IP blocks and extended it to IP platforms with a whole structure of interconnects, I/O and IP that can be re-used as IP platforms. Recycling is also de-risking [the development process] as the issues that could incur costs and delays have already been sorted. Getting a product to market faster than competitors by using this method gives a huge commercial advantage to our customers.”
To further reduce risk and time to market, Sondrel offers a full turnkey service that turns designs into fully tested, shipping silicon.
“Our specialisation is large complex digital chips but every year these are bigger and more complex which means that the processes of effectively managing the design flow becomes more challenging. We solve this by having an R&D programme that finds ways in which we can improve the design process,” said Curren.
One example is an R&D project called Helium ICC2 Checks that automates quality control checks.
“This ensures that these issues are caught at a much earlier stage than previously happened when it is easier to address them as they won’t be buried under layers of code that may also have to be amended. The overall result is that time is saved on the project,” said Kirthi Kishore, Staff Engineer at Sondrel’s office in Hyderabad, India.
The company is currently working on 5nm chip designs at leading foundries. It has also designed a 500 sq mm GPU chip with 30bn transistors on a 16nm process.
www.sondrel.com/sfa-300-datasheet
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