Space-saving 60 A smart power stages simplify designs
Combining power MOSFETs, an advanced driver IC, and a bootstrap FET in the thermally enhanced low-profile 5 mm by 5 mm by 0.66 mm PowerPAK MLP55-32L / QFN package, the Vishay Siliconix SiC645 and SiC645A simplify designs and deliver higher accuracy than comparable standard DrMOS products in a 16 % smaller footprint.
Instead of using inductor DCR sensing — a technique with lower accuracy that requires external components such as a thermistor for temperature compensation — the SiC645 and SiC645A use low-side MOSFET RDS(ON) sensing to accurately report current (IMON) and temperature (TMON) using 5 mV/A and 8 mV/C signals, respectively. This method of current sensing is accurate over a wide load range and is internally temperature-compensated, simplifying designs by removing the need for external circuitry. In addition, it eliminates current sense traces while delivering fast performance without noise or external filtering.
The power stages’ improved accuracy meets Intel’s stringent VR13 and VR13.x current monitoring accuracy requirements and allows for better utilization of a server CPU’s turbo boost capability, a critical advantage for datacenter customers requiring improved performance without increasing costs. Light-load efficiency is supported by a dedicated low-side FET control pin.
The devices offer an input range of 4.5 V to 18 V and are optimized for high-frequency and high-efficiency VRMs and VRDs to power microprocessors and memory for servers, networking, and cloud computing; GPUs in high-performance graphic cards and video game consoles; as well as general purpose multi-phase point-of-load (POL) DC/DC converters. The package of the SiC645 and SiC645A can be cooled on both sides, while low package parasitic resistance and inductance enable high switching frequencies of up to 2 MHz.
Fault protection features for the RoHS-compliant, halogen-free devices include high-side FET short and overcurrent protection, over-temperature protection, and undervoltage lockout (UVLO). The power stages feature open drain fault reporting output. The SiC645 and SiC645A support 5 V and 3.3 V PWM tri-level input, respectively, and are compatible with Intersil’s ISL68/69xx and ISL958xx digital multiphase controllers.
Samples and production quantities of the smart power stages are available now, with lead times of 10 weeks.
More details are avilable at www.vishay.com/ppg?65424
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