Stacked MOSFET 3D package cuts footprint

Technology News |
By Nick Flaherty

Diodes has developed a stacked dual MOSFET package that reduces the footrint of power designs. 

The first in the series, the DMN3012LEG, provides significant cost, power, and space savings in a wide variety of power conversion and control applications.

The DMN3012LEG integrates dual MOSFET chips in a single package measuring 3.3mm x 3.3mm and, as you might expect, cuts the board footprint by half compared to a typical two-chip design. This is of particular interest to designers of point of load (PoL) and power management modules, but it can also be used in DC-DC synchronous buck converters and half-bridge power topologies to reduce the size of power converter solutions.

The 3D PowerDI 3333-8 Type D package developed by Diodes also helps to increase overall power efficiency with higher voltage and current ratings. The fully-grounded pad design delivers good thermal performance, allowing the total solution to run cooler. The high switching speeds and efficiency of the process used also minimize the need for large inductors and capacitors.

The DMN3012LEG integrates two N-channel enhancement mode MOSFET devices suitable for synchronous buck converter designs. Using a lateral diffused MOS (LDMOS) process, these MOSFETs combine fast turn-on and turn-off delay speeds of 5.1nS and 6.4nS for Q1, and 4.4nS and 12.4ns for Q2. Each MOSFET in the package has maximum on-resistance (RDS(ON)) figures of 12mΩ at Vgs=5V for Q1 and 6mΩ at Vgs=5V for Q2. The DMN3012LEG can accept a 30V drain-source voltage with 10V gate-source, while supporting 5V gate drive.

The DMN3012LEG is available now priced at $0.589 each in 1000 piece quantities.

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