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Startup offers 112Gbps SerDes targeting 7nm silicon

Technology News |
By Peter Clarke


The company was founded in 2017 by executives with previous experience at Snowbush and V Semiconductor. The company’s first licensable IP is AlphaCore, which targets a 7nm silicon manufacturing process.  The company said it has demonstrated working 7nm silicon to multiple customers.

The multi-standard serdes (MSS) IP supports Ethernet, PCI-Express, CPRI, and dozens of other standards. It is based on a digital signal processing architecture and is the world’s most power efficient and smallest area 1Gbps to 112Gbps serdes, Alphawave claimed, in a statement, adding that the core is 45 percent smaller, and consumes 25 percent lower power than the most advanced competition.

“Tier one companies in the datacenter and networking segments have bet billion-dollar products on our IP, and they wanted to see that we had a compelling, flexible, and robust solution that works in real silicon,” said Tony Pialis, co-founder and CEO of Alphawave IP, in the same statement.

Alphawave has several other MSS IP cores in development targeting 7nm silicon including the DieCORE and ChipCORE.

DieCORE is targeted at ultra-short-reach system-in package and board-level chip-to-chip links and supports less than 1mW/Gbps at 112 Gbps.  The entire portfolio of Alphawave MSS IPs is also being targeted to processes beyond 7nm.

Alphawave is also working on a multi-standard Radio (MSR) portfolio that will be launched later in 2019. Both the MSS and MSR portfolios leverage a common DSP-based architecture that was developed by Alphawave in 2017.

Related links and articles:

www.awaveip.com

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