Startup programs multicores on data, not gut

Startup programs multicores on data, not gut

Technology News |
By Julien Happich

But when it comes to programming a multicore system — whether multicores are homogeneous or heterogeneous, such an insurmountable task has been left to engineering teams’ “empirical experience” or their “seat-of-the-pants” programming, observed Kumar Venkatramani,vice president, business development at Silexica. “Software for these multicores has not come of age yet,” he said.

Silexica (Aachen, Germany) announced Wednesday that the next generation of the company’s SLX Tool Suite is shipping now. Silexica’s engineering team spent more than a decade in multicore software design automation for complex, multicore platforms, before it was founded in 2014 as a spin-off from the Institute for Communication Technologies and Embedded Systems (ICE) at RWTH Aachen University.

The company offers a suite of automated software modelling tools both for multicore SoC developers and hardware/software system architects.

Silexica’s products include tools to expose parallelism and solve software mapping problems. They have been named respectively SLX Parallelizer, SLX Mapper, SLX Generator, and SLX Explorer. Under the new version, “Each tool has grown up,” said Venkatramani. Changes made in the updated version include: supporting additional languages and broadening the type and kinds of models.


Growing problems
Programming for multicores is no cakewalk, especially at a time when the number of cores is exponentially growing and those cores include different computation engines such as CPUs and DSPs.

Take an example of 5G base stations, said Venkatramani. It’s not unusual to find a project in which designers are developing a system consisting of 500 cores where 55,000 tasks must run. 500 engineers are put to the task in programming it. The project would take 4 times longer to complete, 3 times more engineers, resulting in 4.5 times more costly, he explained.

For now, Silexica is targeting its tools for three key market segments. They include embedded vision/augmented reality, wireless broadband and autonomous driving/ADAS.

Common to all three segments is that these applications tend to “push the boundaries of available hardware,” noted the company. These segments also use applications that have little legacy.

More important, those multicore system designers and programmers are under tremendous pressure to innovate. They need, more than anything else, tools that let them do data-oriented analysis, rather than “eye-balling” and relying on “gut feel,” Venkatramani explained.

What each tool offers
The SLX Mapper and SLX Generator are, in essence, designed for users to figure out and automate which portion of the software should run on which of the available cores.

Both tools offer “accurate performance estimation and bottleneck identification,” said the company, while they provide simultaneous mapping of computations and communications.

More specifically, the SLX Mapper is responsible for automatic software distribution for efficient use of underlying hardware, while the SLX Generator provides automatic code generation for improved productivity.


SLX tool suite (Source: Silexica)

The updated version of these tools now allow designers to optimize critical system parameters such as latency and throughput, in addition to power and energy. The tools can now offer “on-chip communication and congestion analysis on bus,” said Venkatramani.

Silexica made these enhancements because customers are finding more granular level of optimization necessary, to meet with different system requirements. Take an example of power, said Venkatramani. Some systems are more concerned about average power, while others need to pay attention to peak power.

These tools can help them decide on specific hardware or architecture that can address their application needs.

Meanwhile, the SLX Parallelizer is a tool designed to assist in bringing sequential code to the parallel world. The previous tool already supported C, but in the new version of the SLX Parallelizer, Silexica has now added C++ language support. The Parallelizer, in essence, helps customers migrate legacy C, C++ applications into the multicore world, giving deep insights into parallelization possibilities based on the target platform, the company said.

The SLX Explorer is for system architects when they need to select the best target hardware. The tool gives them insights into software performance/power prediction of the target application. The new release also supports 64-bit and PowerPC modelling capabilities for broader platform support, the company said.

Competitive landscape
So, who else are competing with Silexica for automated programming tools for multicore systems?

Although different companies offer a certain level of help in automated programming for multicores, “they usually offer a single tool that addresses a specific segment,” said Venkatramani. “No one vendor is addressing all of the issues like we are doing.” Meanwhile, some customers have their own, home-grown tools for their internal use, he added.

Silexica sees their tools addressing the needs of both SoC designers and system architects.

Asked if the use of Silexica’s tools is limited to only certain processors, Venkatramani said, “Our approach is to model the processors external to the tool itself in an XML file. This allows the models to be developed orthogonal to the tool itself and customers and others can develop these models also.”

The company, however, added that supported targets of SLX Mapper and Generator, thus far, are: host execution, Texas Instruments’ OMAP, Keystone, NXP T4240, NXP B4860, Parallella/Epiphany, ARM 32bit-based platforms and ARM 64bit-based platforms. “We will be growing our library of models,” Venkatramani added.


Silexica, although founded only two years ago, has already picked up a few major customers including Huawei and Fujitsu.

Noting that the company has been doing research based on the SLX Tool Suite for the last four years initially in cooperation with a team at RWTH Achen University, Xiaotao Chen, director, Huawei Wireless R&D USA, said in a statement: “The System-level profiling and optimization toolset achieved surprising improvement in both performance and power efficiency over traditional approaches, from processing units (DSP/CPU) power analysis to network-on-chip power efficiency, all the way to power-aware mapping and scheduling of heterogeneous and hierarchical architectures for our wireless baseband applications.”

Meanwhile, Fujitsu has set its sights on the emerging challenges in optimizing communication and automotive applications onto multicores. “We have successfully integrated the SLX Tool Suite into our multicore software development flow to address these challenges,” said Noriyasu Nakayama, Manager Fujitsu Advanced Technologies Ltd., in a statement.

Silexica pointed out, during the interview, the standardization work going on at the Multicore Association. Aimed at optimizing products with multicore processor implementations, the non-profit organization has been developing an updated version of its Software/Hardware Interface for Multicore/Manycore (SHIM) processors and tools. Silexica noted that the initial updates which will be included in SHIM 2.0 will come from Silexica, an MCA member.

— Junko Yoshida, Chief International Correspondent, EE Time

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