STMicroelectronics has launched a new architecture for its automotive microcontrollers based around the ARM Cortex-R52 core that support hardware virtualisation to combine virtual electronic control units (ECUs) in a single unit.
Developed with Bosch, the Stellar microcontrollers have been specifically designed to meet the requirements of modern vehicle architectures with the virtualisation of ECUs via hardware to host multiple applications simultaneously without affecting the determinism.
The reliable and deterministic processing of multiple concurrent real-time applications is one of the biggest challenges facing OEMs and tier ones in the current wave of virtualisation of automotive electronics. The complexity of new vehicle architectures leads to the consolidation of independent applications in a single, powerful integration microcontroller and usually requires a decision between determinism and virtualisation. The Stellar range offers both.
ST has equipped its Stellar MCUs with exceptionally high processing power, which simplifies concurrent and deterministic processing of software from multiple sources while ensuring the highest levels of functional safety and performance. These capabilities meet the system requirements of the electrical and electronic architectures of the next generation of networked automobiles.
Alongside hardware virtualisation, the Stellar microcontrollers add quality of service settings, the ability to secure peripheral functions with firewalls and resource separation at the interconnect levels. These features allow multiple applications or Virtual ECUs to coexist on the same physical MCU, by safely eliminating mutual interference and ensuring mutual isolation of software functions. Multiple ASIL levels are supported at the same time.
“We have designed the functionality of the Stellar family to meet the integration challenges while providing isolation and sealing,” said Axel Aue, Vice President of Bosch. “The computing power is outstanding for systems of this type and the performance of the phase-change memory matches or exceeds the performance level of alternative flash technologies. Last but not least, the Stellar family has demonstrated impeccable performance in FOTA (Firmware Over The Air) updates with no downtime or recovery times”.
The architecture is designed to meet the requirements of future domain and zone architectures and service-oriented communication tasks over anad above the the current Linux/Posix based integration platforms. The virtualisation integrates multiple applications developed with different tools and on different software schedules. Non-volatile Phase-Change Memory (PCM) supports the safety features with the ability to overwrite single bits and highly effective over-the-air updates without downtime.
The Stellar family houses multiple Arm Cortex R52 cores, some of which operate in lockstep and some in split-lock mode, and is also equipped with a two-stage Memory Protection Unit and a low-latency Generic Interrupt Controller. The microcontroller is suitable for hard real-time requirements up to the highest Safety Integrity Level (ASIL-D) of the ISO 26262 functional safety standard used in the automotive industry. It also features several powerful accelerators for secure data routing and mathematical functions, with sophisticated security support and extensive command and control functions for communication.
The Integration MCU provides comprehensive, multi-level virtualisation using a Virtual Machine ID (VMID) at the network-on-chip and memory levels. Firewalls ensure complete separation at all interconnect levels, including peripherals. These firewalls allow the Stellar devices to manage the access and privileges of the virtual machines (VMs) to the peripherals, ensuring the isolation of complete mission critical functions.
At the same time, the Stellar family copes with the increasing complexity of software thanks to better utilisation of its hardware resources. This reduces the overall effort when several separate ECUs have to take care of their own housekeeping and the latency due to the communication stack has to be taken into account. In contrast, the Stellar family supports several independently running real-time operating systems without any mutual interference. These operating systems, in turn, can separately manage applications with different functional safety levels and offer high performance for encrypted communication via Ethernet or CAN buses. Each operating system has its own AES encryption accelerator, which reduces the load on the main HSMs (Hardware Security Modules) for MACSec, IPSec and CAN authentication.
Phase-change memory (PCM) has shorter read access times and unlike the widely used flash memories, it is possible to access, read and overwrite individual bits. PCM memories also allow Over-The-Air Updates (OTA) without downtime – even if updates affect the entire memory. In addition to increased flexibility and shorter erase/write cycles, the ability to change individual bits at run time improves safety setup by allowing individual bits to be refreshed.
ST uses its own embedded PCM technology (ePCM) to meet the stringent requirements of the automotive sector for robust operation at high temperatures, radiation resistance, cycle stability and data retention. ePCM meets the requirements for AEC-Q100 Grade 0 with an operating temperature up to +165°C.
- ARM adds functional safety IP to CPU and GPU architectures
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- Virtualisation on microcontrollers
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