MENU

STMicroelectronics and Soitec cooperate on SiC

Business news |
By Jean-Pierre Joosting


STMicroelectronics and Soitec have announced the next stage of their cooperation on Silicon Carbide (SiC) substrates, with the qualification of Soitec’s SiC substrate technology by ST planned over the next 18 months. The goal of this cooperation is the adoption by ST of Soitec’s SmartSiC™ technology for its future 200mm substrate manufacturing, feeding its devices and modules manufacturing business, with volume production expected in the midterm.

“The transition to 200mm SiC wafers will bring substantial advantages to our automotive and industrial customers as they accelerate the transition toward electrification of their systems and products. It is important in driving economies of scale as product volumes ramp,” said Marco Monti, President Automotive and Discrete Group, STMicroelectronics. “We have chosen a vertically integrated model to maximize our know-how across the full manufacturing chain, from high-quality substrates to large-scale front- and back-end production. The goal of the technology cooperation with Soitec is to continue to improve our manufacturing yields and quality.”

“The automotive industry is facing major disruption with the advent of electric vehicles. Our cutting-edge SmartSiC™ technology, which adapts our unique SmartCut™ process to silicon carbide semiconductors, will play a key role in accelerating their adoption,” said Bernard Aspar, Chief Operating Officer of Soitec. “The combination of Soitec’s SmartSiC™ substrates with STMicroelectronics’ industry-leading silicon carbide technology and expertise is a game-changer for automotive chip manufacturing that will set new standards.”

Transitioning from 150mm to 200mm wafers will enable a substantial capacity increase, with almost twice the useful area for manufacturing integrated circuits, delivering 1.8 to 1.9 times as many working chips per wafer.

SmartSiC™ is a proprietary Soitec technology which uses Soitec proprietary SmartCut™ technology, to split a thin layer of a high quality SiC ‘donor’ wafer, and bond it on top of a low resistivity ‘handle’ polySiC wafer. The engineered substrate then improves device performance and manufacturing yields. The prime quality SiC ‘donor’ wafer can be reused multiple times, significantly reducing the overall energy consumption required to produce it.

www.st.com
www.soitec.com/en


Share:

Linked Articles
10s