sureCore offers low-power SRAM IP customization service
The patented and silicon-proven techniques are designed to prioritize power optimization over speed and area. The new service covers a wide spectrum of memory requirements covering multiple read/write ports, ultra-low leakage retention modes, low dynamic power, near-threshold operation, write masking and BIST/DFT support.
The service includes memory variants, such as SRAM and Register Files based on either standard foundry or custom bit cells, the latter capable of delivering ultra-low operating voltages, improved leakage characteristics and improved performance.
sureCore’s design approach and memory architectures include:
- Segmented arrays and bit line voltage control that delivers optimal dynamic power and performance.
- SMART-Assist circuitry for near-threshold operation across process and temperature extremes.
- Highly granular sleep modes, coupled with independent sub-banks.
- Custom single and multi-port bit cells.
- Pipelined read circuitry that meets demanding performance goals.
The service produces results based on a rigorous verification regime, which incorporates statistical, parametric and physical validation, and ensures that sureCore’s application-centric memories meet quality requirements. Design flows based on industry-leading, memory characterization tooling delivers multiple PVT corners quickly, accurately and automatically. All industry-standard EDA views are supported.
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