Synchronous debugging of systems with multiple processors
The modular multi-target debug adapters from tool vendor pls PLS Programmierbare Logik & Systeme GmbH (Lauta, Germany) support different systems, which enable redundant and possibly inverting control algorithms with two separate microcontrollers on the same board. A particular focus is on future applications with highest functional safety and fault tolerance requirements, such as fail-operational systems for autonomous driving. Nevertheless, the toolkit also proves can also be used for available systems such as Infineon’s Automotive Gateway development boards that contain two Infineon Aurix multicore microcontrollers.
The multi-target debug adapter for the UAD3+ allows two closely interlocked Aurix microcontrollers to stop and run almost synchronously. A standard debug adapter is connected to each of the separate debug interfaces of the two Aurix devices for this purpose. These are then connected via the multi-target debug adapter to a UAD3+ debug pod, which has the two necessary debug channels.
In addition to the connectors for the standard debug adapters, the multi-target debug adapter has an additional connector for certain trigger signals of the two Aurix controllers. A special logic in the multi-target debug adapter links the trigger lines in such a way that the two Aurix microcontrollers can be stopped and run virtually synchronously. It does not matter whether the entire system reacts to a breakpoint in one of the two controllers or to a break action triggered by the user. The time offset between the two controllers caused by the internal logic of the adapter and the signal propagation times when stopping or running again is on average only about 65 ns, i.e. at a typical 300 MHz clock frequency less than 20 clocks.
Both microcontrollers in a debug session can be accessed and controlled within a common, consistent user interface. In addition, the established multicore run control management of the UDE is available for debugging this multi-Aurix platform. All or a definable number of cores of the two controllers can be combined in a run-control group. Breakpoints, manual stopping and, of course, synchronous re-running are jointly effective for all cores in this group.
Pls will exhibit the system at electronica 2018 in hall B4, booth W22.
More information: www.pls-mc.com
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