MENU

chiplet

chiplet
Socionext and imec renew agreement for advanced semiconductor research
Socionext and imec renew agreement for advanced semiconductor research
News |
Socionext has renewed its cooperative research agreement with imec, expanding its focus on advanced 3D packaging and…
Cadence, Samsung bring AI to SoC, 3D-IC and chiplet design
Cadence, Samsung bring AI to SoC, 3D-IC and chiplet design
Business news |
Collaboration expanded with a new multi-year IP agreement and joint development of advanced AI-driven flows on the latest SF2P process…
Applied Materials takes stake in Dutch firm BESI
Applied Materials takes stake in Dutch firm BESI
Business news |
US chip manufacturing equipment maker Applied Materials has taken a 9 percent stake in BE Semiconductor Industries NV (Duiven, The…
Cadence to acquire French security specialist Secure-IC
Cadence to acquire French security specialist Secure-IC
News |
EDA and IP company Cadence Design Inc. (San Jose, Calif.) has agreed to buy Secure-IC (Rennes, France), an embedded security…

Europe okays Italy’s €1.3 billion subsidy for chiplet fab
Europe okays Italy’s €1.3 billion subsidy for chiplet fab
Business news |
The European Commission has approved a €1.3 billion subsidy from the Italian government to Silicon Box for its advanced packaging and testing facility in Novara, in the Piedmont region. The…
Report: SK Hynix mulls offering advance packaging foundry service
Report: SK Hynix mulls offering advance packaging foundry service
Business news |
Memory chip vendor SK Hynix is considering a move into 2.5D chip packaging as a foundry outsource operation, according to South Korea’s ETnews. The move may be partially driven by…
No date given for Samsung to supply Preferred Networks’ 2nm chips
No date given for Samsung to supply Preferred Networks’ 2nm chips
Business news |
Samsung Electronics has said it will provide 2nm chips and 2.5D advanced packaging to Japanese AI company Preferred Networks but has not said when it will do so. Samsung said…
Silicon Box favors Novara for Italian chiplet fab site
Silicon Box favors Novara for Italian chiplet fab site
News |
Singapore startup Silicon Box Pte. Ltd. is set to select Novara in the Piedmont region of Italy as the location for a previously announced €3.2 billion (about US$3.5 billion) chiplet…
Absolics awarded US$75 million CHIPS funds for glass substrates
Absolics awarded US$75 million CHIPS funds for glass substrates
Technology News |
The Department of Commerce has agreed to provide Absolics Inc. (Covington, Florida) with up to US$75 million under the CHIPS and Science Act to build a glass substrates chiplet packaging…
Technical conference supports chiplet paradigm
Technical conference supports chiplet paradigm
Technology News |
One of the highlights of the upcoming IEEE Electronic Components and Technology Conference (ECTC) will be a complete computer the size of a grain of salt. At the conference…
Report: IBM plans US$730 million Canadian chip expansion
Report: IBM plans US$730 million Canadian chip expansion
Business news |
IBM Corp. plans to spend CA$1 billion (about US$730 million) upgrading and expanding its assembly, testing and packaging (ATP) facility at Bromont, Canada, according to a Bloomberg report. The move…
Chiplet startup Eliyan now backed by all major memory firms
Chiplet startup Eliyan now backed by all major memory firms
Business news |
Chiplet interconnect startup Eliyan Corp. (Santa Clara, Calif.) has raised US$60 million in a Series B funding round led by Samsung Catalyst Fund and Tiger Global Management. Existing investors Intel…
Scalable sub-pJ/bit chiplet interconnect with 10m reach
Scalable sub-pJ/bit chiplet interconnect with 10m reach
Technology News |
Avicena is announcing its new scalable LightBundle chiplet interconnect at OFC 2024 in San Diego, CA. The chiplet interconnect extends ultra-high density die-to-die (D2D) connections up to 10m at multi-Tbps/mm…
Silicon Box adds detail to its Italian job
Silicon Box adds detail to its Italian job
News |
Silicon Box has confirmed it plans to collaborate with the Italian government and invest up to €3.2 billion (about US$3.5 billion) for a chiplet assembly and test factory in the…
Silicon Box to build €3.2 billion Italian chiplet factory
Silicon Box to build €3.2 billion Italian chiplet factory
Business news |
Singapore startup Silicon Box Pte. Ltd. will spend €3.2 billion (about US$3.5 billion) building a chiplet packaging factory in northern Italy, newswires quote Industry Minister Adolfo Urso saying Monday morning.
Socionext collaborates with Arm and TSMC on 2nm chiplet development
Socionext collaborates with Arm and TSMC on 2nm chiplet development
Business news |
Next-generation compute chiplet-based proof-of-poncept leverages Arm Neoverse CSS technology and TSMC silicon process Along with advanced packaging.
QuickLogic, YorChip to develop FPGA chiplets
QuickLogic, YorChip to develop FPGA chiplets
Business news |
FPGA vendor QuickLogic Corp. has partnered with YorChip Inc. (San Ramon, Calif.) to create UCIe-compatible FPGA chiplets. UCIe stands for Universal Chiplet Interconnect Express. It is an open specification for…
TSMC grabs land for another back-end packaging fab
TSMC grabs land for another back-end packaging fab
Business news |
Leading chip foundry TSMC is planning to spend NT$90 billion (about US$2.9 billion) on an advanced packaging facility in Tongluo Science Park, Miaoli County, Taiwan. This will be TSMC’s second…
TSMC’s biggest chiplet backend fab opens for business
TSMC’s biggest chiplet backend fab opens for business
Business news |
TSMC has opened its Advanced Backend Fab 6 – a major packaging and testing fab to realize 3DFabric integration, the foundry’s approach to chiplet and multi-die component assembly. The fab…
Eliyan gets 40Gbps/bump chiplets back from TSMC
Eliyan gets 40Gbps/bump chiplets back from TSMC
Technology News |
Chiplet startup Eliyan Corp. (Santa Clara, Calif.) has received its first silicon in 5nm manufacturing process technology from foundry TSMC. The chiplet implments the company’s NuLink PHY technology in support…
RISCs ‘not-in-Space’ (with statement from the Pulp Platform)
RISCs ‘not-in-Space’ (with statement from the Pulp Platform)
News |
The 432-Core Risc-V based Occamy processor board is ready to launch – with updated link! The ETH in Zurich, together with the Alma Mater Studiorum Universita di Bologna presented the…
Fraunhofer picks Achronix eFPGAs for chiplet demonstrator
Fraunhofer picks Achronix eFPGAs for chiplet demonstrator
Business news |
Collaboration to create an eFPGA-enabled chiplet solution aimed at validating next-generation chip-to-chip interconnect technology.
Chinese chiplet architecture for data centres, automotive
Chinese chiplet architecture for data centres, automotive
Business news |
Blue Ocean Smart System in China has developed a scalable chiplet architecture for high performance computing, automotive and data centre applications. The chiplet architecture uses multiple processors from VeriSilicon in…
Winbond to support chiplet interface standardisation
Winbond to support chiplet interface standardisation
Business news |
The UCIe Consortium open industry standard defines interconnect between chiplets within a package, enabling an open ecosystem.
OCP and JEDEC look to standardize chiplet part descriptions
OCP and JEDEC look to standardize chiplet part descriptions
Technology News |
Partnership establish a framework for the creation of new global standards for novel device components such as chiplets in emerging markets.
Intel goes slow, casts doubt on Italian chiplet fab
Intel goes slow, casts doubt on Italian chiplet fab
Business news |
Intel’s CEO Pat Gelsinger has cast doubt on Italy as the location for a US$5 billion chiplet assembly plant, saying other locations are possible. Intel is also apparently slowing down…
Intel close to Italy chiplet assembly plant – report
Intel close to Italy chiplet assembly plant – report
Business news |
Intel is close to announcing a plant to assemble 25 and 3D packages in Italy, according to a report from Reuters. The investment could be as much as $5bn although…
Open source chiplet interconnect spec aims for composable silicon
Open source chiplet interconnect spec aims for composable silicon
Market news |
The nonprofit Open Compute Project Foundation (OCP) has announced an open source chiplet interconnection specification optimized for maximum applicability enabling low cost and energy efficient implementations.
  • 1
  • 2


10s