Tapeout of clock IP on 2nm silicon
Silicon Creations in the US and Poland has taped out clock designs on 2nm silicon with a novel temperature sensor.
The designs use the N2P process from TSMC in a move that highlights the 2nm technology is ready to use for next generation chips and chiplets. TSMC was reported to be starting trial 2nm production for Apple back in July, which would see silicon emerging this month. AIchip has also taped out a 2nm chip design.
The temperature sensor using N2P technology marks a departure from traditional bipolar junction transistor (BJT) temperature sensing methods.
Extensive silicon testing across process, voltage, and temperature (PVT) variations, along with detailed test reports, reduces the risk for designers and cuts the time it takes to develop a 2nm chip. Silicon Creations has proven ring-based and LC-based phase-locked loops (PLLs) and oscillators in 2nm silicon for chip designs. The company has developed Jitter-optimized, power-optimized, and area-optimized PLLs, fast-frequency-hopping frequency-locked loops (FLLs) and free-running oscillators as well as low-noise clock buffers.
The company has design centres at its headquarters in Atlanta, Georgia and in Krakow, Poland. It has over 450 different PLLs that have been used in over 1,600 mass production chips and has been deployed in over 12 million 300mm wafers.
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