Tensilica adds DSP in cellular battle
The core design, available now, can reach speeds of more than a GHz in a high performance 45 nm process with an area of just 0.044 mm2, Tensilica claims. The core is already being used in the company’s ConnX BBE64 DSP for LTE Advanced cellular communications launched in February.
The LX4 is aimed at wired or wireless baseband processing, video pre- and post-processing, image signal processing and network packet processing functions. But cellular basebands represent the largest target, especially for high-end cores that can fill the needs of LTE services just starting to come on line.
Currently Ceva commands as much as 90 percent of the business for licensed DSP cores in cellphone baseband processors, according to Will Strauss, principal of Forward Concepts. Ceva became the largest cellular baseband provider last fall, surpassing Qualcomm and others.
A handful of smaller players are also active, including Sweden’s Coresonic that licensed its DSP cores to Mediatek in February.
"Tensilica believes its cores have lower power and a smaller footprint [than Ceva’s cores], and Tensilica is supporting multiple cores rather than one big DSP which is the Ceva approach," said Strauss.
Ceva currently supplies cores for Broadcom, China’s Spreadtrum and the Infineon wireless group acquired by Intel, he said. DSP is a growing business for Tensilica with plenty of upside, Strauss added.
"Tensilica is making more revenues in DSP than RISC cores now, much of it going into cellular and audio, and they are seeing a lot of uptake in baseband," said Strauss.
Tensilica has design wins in Fujitsu LTE products for DoCoMo’s LTE service which is just starting to ramp up. Verizon in the U.S. and Telia Sonora in Sweden also have launched LTE services only with external data modems for notebooks so far, but big launches of LTE handsets could begin as early as June, Strauss said.
So far Samsung is leading the market for LTE chips used in dongles, said Strauss. But it’s too early to pick winners and losers in the emerging market, he added.
The LX4 fills out Tensilica’s DSP portfolio which ranges from a GigaMAC/second product that fits into 0.01-mm2 in a 28-nm process to the ConnX which achieves more than 100 GigaMAC/s, the company claims.
The new core doubles the 64-bit width of prior Xtensa instructions. It lets developers mix 64- and 128-bit instructions without a switching penalty, the company said.
The new data prefetch option aims to reduces cycle counts in long-latency designs by fetching data from system memory ahead of its use. The technique is geared to accelerate streaming data from contiguous memory locations.
In tandem with the new core the company is rolling out a vectorization assistant tool to improve compiler performance of C-code when running on single instruction, multiple data DSPs. The tool explains what is preventing further vectorization so software developers can improve the source C-code to take advantage of the core’s parallel execution units
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